Method and System for Boot Time Optimization of Embedded Multiprocessor Systems

• US 20170123810A1
• Filed: 03/31/2016
• Published: 05/04/2017
• Est. Priority Date: 10/30/2015
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Chitnis, Kedar Satish, Marathe, Yogesh Vikram, Garg, Rishabh
• Granted Patent: US 10,956,169 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 9/4401 Bootstrapping security arrangements therefor G06F21/57
• CPC Class Codes: G06F 9/4405 Initialisation of multiprocessor systems

Abstract

An embedded multiprocessor system is provided that includes a multiprocessor system on a chip (SOC), a memory coupled to the multiprocessor SOC, the memory storing application software partitioned into an initial boot stage and at least one additional boot stage, and a secondary boot loader configured to boot load the initial boot stage on at least one processor of the multiprocessor SOC, wherein the initial boot stage begins executing and flow of data from the initial boot stage to the at least one additional boot stage is disabled, wherein the application software is configured to boot load a second boot stage of the at least one additional boot stage on at least one other processor of the multiprocessor SOC and to enable flow of data between the initial boot stage and the second boot stage.

Claims

1. An embedded multiprocessor system comprising:

a multiprocessor system on a chip (SOC);

a memory coupled to the multiprocessor SOC, the memory storing application software partitioned into an initial boot stage and at least one additional boot stage; and

a secondary boot loader configured to boot load the initial boot stage on at least one processor of the multiprocessor SOC, wherein the initial boot stage begins executing and flow of data from the initial boot stage to the at least one additional boot stage is disabled;

wherein the application software is configured to boot load a second boot stage of the at least one additional boot stage on at least one other processor of the multiprocessor SOC and to enable flow of data between the initial boot stage and the second boot stage.

2. The embedded multiprocessor system of claim 1, wherein flow of data between boot stages of the application software is controlled by one or more gate modules, each gate module configured to enable or disable flow of data through the module under command of the application software.

3. The embedded multiprocessor system of claim 1, wherein the application software is configured to use a program interface to the secondary boot loader to boot load the second boot stage.

4. The embedded multiprocessor system of claim 1, wherein the embedded multiprocessor system is coupled to a camera to receive video frames and the initial boot stage is configured to capture video frames from the camera and display the video frames on a display device.

5. The embedded multiprocessor system of claim 4, wherein the embedded multiprocessor system is a rear view camera system.

6. The embedded multiprocessor system of claim 5, wherein the secondary boot loader is also configured to boot load a processor hosting a Controller Area Network (CAN) stack.

7. The embedded multiprocessor system of claim 1, wherein the at least one processor comprises an image processor and the at least one other processor comprises at least one of a digital signal processor and a vision processor.

8. The embedded multiprocessor system of claim 1, wherein the embedded multiprocessor system is an automotive safety system.

9. A method for booting an embedded multiprocessor system, the method comprising:

boot loading an initial boot stage of application software of the embedded multiprocessor system on at least one processor of a multiprocessor system on a chip (SOC) comprised in the embedded multiprocessor system, wherein the initial boot stage begins executing and flow of data from the initial boot stage to a subsequent boot stage of the application software is disabled;

boot loading, under control of the application software, the subsequent boot stage of the application software on at least one other processor of the multiprocessor SOC; and

enabling flow of data between the early boot stage and the subsequent boot stage by the application software.

10. The method of claim 9, wherein flow of data between boot stages of the application software is controlled by one or more gate modules, each gate module configured to enable or disable flow of data through the module under command of the application software.

11. The method of claim 9, wherein the boot loading an initial stage is performed by a secondary boot loader and the application software uses a program interface to the secondary boot loader to boot load the subsequent boot stage.

12. The method of claim 9, wherein the initial boot stage includes functionality to capture and display video frames on a display device.

13. The method of claim 9, wherein the at least one processor comprises an image processor and the at least one other processor comprises at least one of a digital signal processor and a vision processor.

14. The method of claim 9, wherein the embedded multiprocessor system is a rear view camera system.

15. The method of claim 14, further comprising boot loading a processor hosting a Controller Area Network (CAN) stack.

16. An automotive safety system comprising:

a multiprocessor system on a chip (SOC);

a camera coupled to the multiprocessor SOC;

a memory coupled to the multiprocessor SOC, the memory storing application software partitioned into an early boot stage and a late boot stage, wherein the early boot stage is configured to capture video frames from the camera and to display the video frames on a display device and the late boot stage is configured to detect objects in the video frames; and

a secondary boot loader configured to boot load the early boot stage on a master processor of the multiprocessor SOC, wherein the early boot stage begins executing and flow of data from the early boot stage to the late boot stage is disabled;

wherein the application software is configured to boot load the late boot stage on at least one other processor of the multiprocessor SOC and to enable flow of data between the early boot stage and the late boot stage.

17. The automotive safety system of claim 16, wherein flow of data between the early boot stage and the late boot stage is controlled by one or more gate modules, each gate module configured to enable or disable flow of data through the module under command of the application software.

18. The automotive safety system of claim 16, wherein the application software is configured to use a program interface to the secondary boot loader to boot load the late boot stage.

19. The automotive safety system of claim 16, wherein the master processor is an image processor and the at least one other processor comprises at least one of a digital signal processor and a vision processor.

20. The automotive safety system of claim 16, wherein the automotive safety system is a rear view camera system.