SYSTEM AND METHOD FOR INDICATOR LIGHT CONTROL OF STORAGE DEVICES

• US 20170123954A1
• Filed: 11/03/2015
• Published: 05/04/2017
• Est. Priority Date: 11/03/2015
• Status: Active Grant

• Current Assignee: Quanta Computer
• Original Assignee: Quanta Computer
• Inventors: SHIH, Ching-Chih
• Granted Patent: US 9,921,933 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 11/3034 where the computing system component is a storage system, e.g. DASD based or network based digital input from or digital output to record carriers G06F3/06; digital recording or reproducing G11B20/18; for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS], H04L67/1097
• CPC Class Codes: G06F 11/325 by lamps or LED's

Abstract

Embodiments generally relate to status indicator control of a computing system. The present technology discloses techniques that enable sufficient and complex display patterns of indicators such as LEDs to interoperate states of storage devices including SSDs. Aspects of the present technology also relate to storage devices connected by a system bus such as peripheral component interconnect express (PCIe).

Claims

1. A system for controlling indicator lights associated with a component, comprising:

a processor; and

a memory device comprising instructions that, when executed by the processor, cause the processor to perform instructions comprising;

generating, using a first control logic, a first control signal operable to control an indicator light associated with a component;

generating, using a second control logic, a second control signal operable to control the indicator light associated with the component;

receiving, using a first combinational logic, the first control signal and the second control signal;

selecting, at the first combinational logic, one of the first control signal and the second control signal based at least in part on at least one value stored in an ownership register to yield a selected control signal; and

controlling a display pattern of the indicator light using the selected control signal.

2. The system of claim 1, wherein generating the second control signal further comprising:

determining, using a pattern control register, the second control signal based at least in part on one or more signals generated by a plurality of pattern generators.

3. The system of claim 2, wherein the plurality of pattern generator comprises at least one of an activity and presence pattern generator, a locate pattern generator, a rebuild pattern generator and a predicted failure analysis pattern generator.

4. The system of claim 1, wherein the display pattern of the indicator light comprises one of an on pattern, an off pattern, or one or more flash patterns each associated with a respective flash frequency, and the display pattern of the indicator light corresponds to one of an activity and presence state of the component, a locate state of the component, a fail state of the component, a rebuild state of the component or a predicted failure analysis state of the component.

5. The system of claim 1, wherein the memory device comprising instructions that cause the processor to further perform instructions comprising:

determining, using the ownership register, that the indicator light is disabled.

6. The system of claim 1, wherein the memory device comprising instructions that cause the processor to further perform instructions comprising:

determining, using the at least one value stored in the ownership register, that the first control logic controls the display pattern of the indicator light.

7. The system of claim 1, wherein the memory device comprising instructions that cause the processor to further perform instructions comprising:

determining, using the at least one value stored in the ownership register, that the second control logic controls the display pattern of the indicator light.

8. The system of claim 1, wherein the second control logic further comprises a second combinational logic configured to select one of a plurality of signals generated by a plurality of pattern generators based at least in part on one or more values stored in a pattern control register to yield the second control signal.

9. The system of claim 1, wherein the first control logic comprises a peripheral component interconnect express hot-plug control logic, wherein the second control logic comprises a peripheral component interconnect express light-emitting diode control logic, wherein the indicator light comprises a light-emitting diode light, and wherein the component comprises a solid state drive.

21. The system of claim 1, wherein the first combinational logic is operable to control a first display pattern of a first indicator light based at least in part on the first control signal, and to control a second display pattern of a second indicator based at least in part on the second control signal.

10. A system, comprising:

a processor; and

a memory device comprising instructions that, when executed by the processor, cause the processor to perform instructions comprising;

generating one or more signals using a plurality of pattern generators, the one or more signals being associated with a plurality of storage device states;

receiving, at a pattern control combinational logic, the one or more signals;

selecting, at the pattern control combinational logic, one of the one or more signals based at least in part on at least one value stored in a pattern control register to yield a selected control signal; and

controlling, using the selected control signal, a display pattern of an indicator light associated with a storage device, the display pattern of the indicator light corresponding to one of the plurality of storage device states.

11. The system of claim 10, wherein the display pattern of the indicator light comprises one of an on pattern, an off pattern, or one or more flash statuses each associated with a respective flash frequency.

12. The system of claim 10, wherein the plurality of storage device states comprises an activity and presence state of the storage device, a locate state of the storage device, a fail state of the storage device, a rebuild state of the storage device or a predicted failure analysis state of the storage device.

13. The system of claim 10, wherein the plurality of pattern generator comprises at least one of an activity and presence pattern generator, a locate pattern generator, a rebuild pattern generator and a predicted failure analysis pattern generator.

14. The system of claim 10, wherein the storage device comprises a solid state drive, wherein the indicator light comprises a light-emitting diode light, and wherein the pattern control register comprises a peripheral component interconnect express light-emitting diode pattern control register.

15. A computer-implemented method, comprising:

generating, using a peripheral component interconnect express hot-plug control logic, a first control signal operable to control a light-emitting diode associated with a solid state drive;

generating, using a peripheral component interconnect express light-emitting diode control logic, a second control signal operable to control the light-emitting diode associated with the solid state drive;

receiving, using a first multiplexer, the first control signal and the second control signal;

selecting, at the first multiplexer, one of the first control signal and the second control signal based at least in part on at least one value stored in a peripheral component interconnect express ownership register to yield a selected control signal; and

controlling a display pattern of the light-emitting diode using the selected control signal.

16. The method of claim 15, wherein generating the second control signal further comprises:

determining, using a peripheral component interconnect express light-emitting diode pattern control register, the second control signal based at least in part on one or more signals generated by a plurality of pattern generators.

17. The method of claim 16, wherein the plurality of pattern generator comprises at least one of an activity and presence pattern generator, a locate pattern generator, a rebuild pattern generator and a predicted failure analysis pattern generator.

18. The method of claim 15, wherein the display pattern of the light-emitting diode comprises one of an on pattern, an off pattern, or one or more flash patterns each associated with a respective flash frequency, and the display pattern of the light-emitting diode corresponds to one of an activity and presence state of the solid state drive, a locate state of the solid state drive, a fail state of the solid state drive, a rebuild state of the solid state drive or a predicted failure analysis state of the solid state drive.

19. The method of claim 15, further comprising:

determining, using the peripheral component interconnect express ownership register, that the peripheral component interconnect express light-emitting diode control logic control the display pattern of the light-emitting diode.

20. The method of claim 15, wherein the peripheral component interconnect express light-emitting diode control logic further comprises a second control logic configured to generate, using a peripheral component interconnect express light-emitting diode pattern control register, the second control signal based at least in part on one or more signals generated by a plurality of pattern generators.