SEMICONDUCTOR PACKAGE WITH COATED BONDING WIRES AND FABRICATION METHOD THEREOF

• US 20170125327A1
• Filed: 06/08/2016
• Published: 05/04/2017
• Est. Priority Date: 11/02/2015
• Status: Active Grant

• Current Assignee: MediaTek, Inc.
• Original Assignee: MediaTek, Inc.
• Inventors: Tsai, Shiann-Tsong, Chang, Chin-Chiang, Wang, Hsueh-Te
• Granted Patent: US 10,037,936 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/4825 Connection or disconnection of other leads to or from flat leads, e.g. wires, bumps, other flat leads
• CPC Class Codes: H01L 21/4853 Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
• CPC Class Codes: H01L 21/565 Moulds
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45139 Silver (Ag) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/45147 Copper (Cu) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49052 Different loop heights
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 2224/8592 Applying permanent coating, e.g. protective coating
• CPC Class Codes: H01L 23/295 : containing a filler H01L23/296 takes precedence
• CPC Class Codes: H01L 23/3121 : a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/3157 : Partial encapsulation or coating mask layer used as insulation layer H01L21/31
• CPC Class Codes: H01L 23/4952 : the additional leads being a bump or a wire
• CPC Class Codes: H01L 23/49586 : Insulating layers on lead frames
• CPC Class Codes: H01L 23/49811 : Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads H01L23/49827 takes precedence
• CPC Class Codes: H01L 23/49838 : Geometry or layout
• CPC Class Codes: H01L 23/49894 : Materials of the insulating layers or coatings
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/85 : using a wire connector wire bonding in general B23K20/004
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/3862 : Sweep

Abstract

A semiconductor package includes a carrier substrate having a top surface, a semiconductor die mounted on the top surface, a plurality of bonding wires connecting the semiconductor die to the carrier substrate, an insulating material coated on the bonding wires, and a molding compound covering the top surface and encapsulating the semiconductor die, the plurality of bonding wires, and the insulating material.

Claims

1. A semiconductor package, comprising:

a carrier substrate having a top surface;

a semiconductor die mounted on the top surface;

a plurality of bonding wires connecting the semiconductor die to the carrier substrate;

an insulating material coated on the bonding wires; and

a molding compound covering the top surface and encapsulating the semiconductor die, the plurality of bonding wires, and the insulating material.

2. The semiconductor package according to claim 1, wherein the insulating material covers a partial portion of each of the bonding wires.

3. The semiconductor package according to claim 1, wherein the top surface of the carrier substrate is also coated with the insulating material.

4. The semiconductor package according to claim 1, wherein the molding compound comprises an epoxy resin and a filler material.

5. The semiconductor package according to claim 4, wherein the insulating material comprises the epoxy resin but without the filler material.

6. The semiconductor package according to claim 4, wherein the insulating material comprises the epoxy resin with a lower content of the filler material.

7. The semiconductor package according to claim 1, wherein the insulating material contains less than 50 ppm halogen content.

8. The semiconductor package according to claim 1, wherein the carrier substrate comprises a packaging substrate, an interposer substrate, or a leadframe substrate.

9-20. -20. (canceled)