Method And System For Split Voltage Domain Receiver Circuits
First Claim
1. A method for processing signals, the method comprising:
- in an integrated circuit;
amplifying received electrical signals in a plurality of partial voltage domains; and
combining said amplified received signals, utilizing a stacked cascode amplifier for each partial voltage domain, into a single differential signal in a single voltage domain, wherein each of said partial voltage domains is offset by a DC voltage from other of said partial voltage domains and wherein a sum of said plurality of partial domains is equal to a supply voltage of said integrated circuit.
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Abstract
Methods and systems for split voltage domain receiver circuits are disclosed and may include amplifying complementary received signals in a plurality of partial voltage domains. The signals may be combined into a single differential signal in a single voltage domain. Each of the partial voltage domains may be offset by a DC voltage from the other partial voltage domains. The sum of the partial domains may be equal to a supply voltage of the integrated circuit. The complementary signals may be received from a photodiode. The amplified received signals may be amplified via stacked common source amplifiers, common emitter amplifiers, or stacked inverters. The amplified received signals may be DC coupled prior to combining. The complementary received signals may be amplified and combined via cascode amplifiers. The voltage domains may be stacked, and may be controlled via feedback loops. The photodetector may be integrated in the integrated circuit.
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Citations
22 Claims
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1. A method for processing signals, the method comprising:
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in an integrated circuit; amplifying received electrical signals in a plurality of partial voltage domains; and combining said amplified received signals, utilizing a stacked cascode amplifier for each partial voltage domain, into a single differential signal in a single voltage domain, wherein each of said partial voltage domains is offset by a DC voltage from other of said partial voltage domains and wherein a sum of said plurality of partial domains is equal to a supply voltage of said integrated circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A system for processing signals, the system comprising:
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in an integrated circuit, one or more circuits operable to amplify received electrical signals in a plurality of partial voltage domains; and said one or more circuits being operable to combine said amplified received signals into a single differential signal, utilizing a stacked cascode amplifier for each partial voltage domain, in a single voltage domain, wherein each of said partial voltage domains is offset by a DC voltage from other of said partial voltage domains and wherein a sum of said plurality of partial domains is equal to a supply voltage of said integrated circuit. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
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Specification