Thin Film Transistor Array Substrate, Manufacturing for the Same, and Liquid Crystal Display Panel Having the Same

• US 20170139247A1
• Filed: 08/13/2015
• Published: 05/18/2017
• Est. Priority Date: 08/06/2015
• Status: Abandoned Application

• Current Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd. (TCL Technology Group Corp.)
• Original Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd. (TCL Technology Group Corp.)
• Inventors: WU, Yue, YONG, Weina, LI, Shan
• Application Number:
  US14/773,410
• Publication Number:
  US 20170139247A1
• Time in Patent Office: Days
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 2029/42388 characterised by the shape of the insulating material
• CPC Class Codes: H01L 21/28008 Making conductor-insulator-semiconductor electrodes
• CPC Class Codes: H01L 21/28158 Making the insulator
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/78609 for preventing leakage current H01L29/78618 takes precedence
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A thin film transistor array substrate includes a glass substrate and a plurality of TFTs thereon. Each TFT includes a gate formed on the glass substrate, a gate insulating layer covering the gate, an active layer formed on the gate insulating layer, a source on the active layer, and a drain on the active layer. A gap is between the source and the drain in a first direction. An area of the active layer that matches the gap is a channel. A plurality of protrusions and recesses on a coarse surface of the gate insulating layer face the active layer, at least within the area corresponding to the channel. The active layer fits with the gate insulting layer. The present invention also proposes a method for manufacturing the thin film transistor array substrate and a liquid crystal display panel having the thin film transistor array substrate.

Claims

1. A thin film transistor (TFT) array substrate, comprising a glass substrate and a plurality of TFTs thereon, each TFT comprising:

a gate formed on the glass substrate, a gate insulating layer covering the gate, an active layer formed on the gate insulating layer, a source on the active layer, and a drain on the active layer, wherein a gap is between the source and the drain in a first direction, an area of the active layer that matches the gap is a channel, and wherein a plurality of protrusions and recesses on a coarse surface of the gate insulating layer face the active layer, at least within the area corresponding to the channel, and the active layer fits with the gate insulting layer.

2. The TFT substrate of claim 1, wherein each of the plurality of protrusions extends along a first direction, and the plurality of protrusions align in a sequence along a second direction perpendicular to the first direction.

3. The TFT substrate of claim 2, wherein each of the plurality of protrusions straightly or windingly extends along the first direction.

4. The TFT substrate of claim 3, wherein each of the plurality of protrusions is shaped as a semicircle or a shape close to a semicircle in a cross-sectional view along the second direction.

5. The TFT substrate of claim 4, wherein the plurality of protrusions are equally-spaced along the second direction, and the coarse surface with the plurality of recesses along the second direction is wave-shaped in a cross sectional view.

6. The TFT substrate of claim 3, wherein the plurality of protrusions in a cross sectional view is shaped as triangles.

7. The TFT substrate of claim 6, wherein the plurality of protrusions are equally spaced and align in a sequence along the second direction, while the recesses on the coarse surface, aligning in a sequence along the second direction, are saw-shaped.

8. The TFT substrate of claim 1 further comprising scan lines as well as data lines on the glass substrate, wherein pixel areas surrounded by the scan lines and the data lines;

the TFT and a pixel electrode is within the pixel area, the pixel electrode is electrically connected to the source or the drain of the TFT.

10. The method of claim 1, wherein each of the plurality of protrusions extends along a first direction, and the plurality of protrusions align in a sequence along a second direction perpendicular to the first direction.

11. The method of claim 2, wherein each of the plurality of protrusions straightly or windingly extends along the first direction.

12. The method of claim 3, wherein each of the plurality of protrusions is shaped as a semicircle or a shape close to a semicircle in a cross-sectional view along the second direction;

the plurality of protrusions are equally-spaced along the second direction, and the coarse surface with the plurality of recesses along the second direction is wave-shaped in a cross sectional view.

13. The method of claim 3, wherein the plurality of protrusions in a cross sectional view is shaped as triangles;

the plurality of protrusions are equally spaced and align in a sequence along the second direction, while the recesses on the coarse surface, aligning in a sequence along the second direction, are saw-shaped.

9. A method of manufacturing a thin film transistor (TFT) substrate, comprising:

(S101) providing a glass substrate and forming a gate on the glass substrate;

(S102) forming a gate insulating layer covering the gate;

(S103) forming a coarse surface on the gate insulting layer, with a plurality of protrusions and a plurality of recesses, by embossing or etching processes;

(S104) forming an active layer on the gate insulting layer, where a surface of the active layer fits the gate insulting layer; and

(S105) forming a source and drain on the active layer.

14. A liquid crystal display (LCD) panel comprising an array substrate, a color filter substrate, and liquid crystal layer therebetween, the array substrate comprising a glass substrate and a plurality of thin film transistors (TFTs) thereon, each TFT comprising:

a gate formed on the glass substrate, a gate insulating layer covering the gate, an active layer formed on the gate insulating layer, a source on the active layer, and a drain on the active layer, wherein a gap is between the source and the drain in a first direction, an area of the active layer that matches the gap is a channel, and wherein a plurality of protrusions and recesses on a coarse surface of the gate insulating layer face the active layer, at least within the area corresponding to the channel, and the active layer fits with the gate insulting layer.

15. The LCD panel of claim 14, wherein each of the plurality of protrusions extends along a first direction, and the plurality of protrusions align in a sequence along a second direction perpendicular to the first direction.

16. The LCD panel of claim 15, wherein each of the plurality of protrusions straightly or windingly extends along the first direction.

17. The LCD panel of claim 16, wherein each of the plurality of protrusions is shaped as a semicircle or a shape close to a semicircle in a cross-sectional view along the second direction.

18. The LCD panel of claim 17, wherein the plurality of protrusions are equally-spaced along the second direction, and the coarse surface with the plurality of recesses along the second direction is wave-shaped in a cross sectional view.

19. The LCD panel of claim 16, wherein the plurality of protrusions in a cross sectional view is shaped as triangles.

20. The LCD panel of claim 19, wherein the plurality of protrusions are equally spaced and align in a sequence along the second direction, while the recesses on the coarse surface, aligning in a sequence along the second direction, are saw-shaped.