MEMORY SYSTEM AND OPERATING METHOD THEREOF

• US 20170139645A1
• Filed: 04/11/2016
• Published: 05/18/2017
• Est. Priority Date: 11/13/2015
• Status: Active Grant

• Current Assignee: SK Hynix Inc.
• Original Assignee: SK Hynix Inc.
• Inventors: BYUN, Eu-Joon
• Granted Patent: US 10,168,952 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0802 Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
• CPC Class Codes: G06F 12/1018 involving hashing techniques, e.g. inverted page tables
• CPC Class Codes: G06F 2212/1016 Performance improvement
• CPC Class Codes: G06F 2212/60 Details of cache memory
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 2212/7203 Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 3/0685 Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays

Abstract

A memory system may include a memory device including a plurality of memory blocks each having a plurality of pages suitable for storing data requested from a host, and a controller including a memory, and suitable for storing write data corresponding to a write command received from the host in a first memory block of the memory blocks, storing first and second map data corresponding to the write data written to the first memory block in a second memory block of the memory blocks, and storing a segment list for first segments of the first map data in the memory.

Claims

1. A memory system comprising:

a memory device comprising a plurality of memory blocks suitable for storing data received from a host; and

a controller comprising a controller memory, the controller being suitable for storing;

write data corresponding to a write command received from the host in a first memory block of the plurality memory blocks;

first and second map data corresponding to the write data written to the first memory block in a second memory block of the plurality memory blocks; and

a segment list for a plurality of first segments of the first map data in the memory.

2. The memory system of claim 1, wherein the controller stores second segments of the second map data in the memory, and sorts the second segments stored in the memory for each of the first segments.

3. The memory system of claim 2, wherein the controller builds the segment list by forming one or more of an entry, a tree, a link, and a hash table between the sorted second segments, for each of the first segments.

4. The memory system of claim 3, wherein when updating the first map data stored in the second memory block, the controller checks a third segment which needs to be updated among the first segments of the first map data, through the segment list.

5. The memory system of claim 4, wherein the controller loads the third segment to the memory, and then checks the third segment and a corresponding one of the sorted second segments for the third segment in the segment list.

6. The memory system of claim 5, wherein the controller updates the corresponding one of the sorted second segments in the third segment loaded to the memory, and then stores the third segment in the second memory block.

7. The memory system of claim 3, wherein:

the first segments in the segment list have a logical address offset therebetween; and

the controller sorts the second segments for each of the first segments, based on the logical address offset.

8. The memory system of claim 2, wherein the controller sorts the second segments for each of the first segments, in a logical address sequence.

9. The memory system of claim 1, wherein:

the first map data comprise logical information corresponding to a data storage to the first memory block; and

the second map data comprise physical information corresponding to the data storage to the first memory block.

10. The memory system of claim 1, wherein the controller checks logical information and physical information on read data corresponding to a read command received from the host, through the segment list.

11. An operating method of a memory system, comprising:

receiving a write command from a host, for a plurality of memory blocks of a memory device; and

storing write data corresponding to the write command in a first memory block of the memory blocks, storing first and second map data corresponding to the write data written in the first memory block into a second memory block of the memory blocks, and storing a segment list for first segments of the first map data in a memory included in a controller of the memory device.

12. The operating method of claim 11, wherein the storing of the segment list comprises:

storing second segments of the second map data in the memory, and sorting the second segments stored in the memory for each of the first segments.

13. The operating method of claim 12, wherein the storing of the segment list further comprises:

building the segment list by forming one or more of an entry, a tree, a link, and a hash table between the sorted second segments, for each of the first segments.

14. The operating method of claim 13, further comprising:

updating the first map data stored in the second memory block by checking a third segment which needs to be updated among the first segments of the first map data, through the segment list.

15. The operating method of claim 14, wherein the updating of the first map data comprises:

loading the third segment to the memory, and checking the third segment and a corresponding one of the sorted second segments for the third segment in the segment list.

16. The operating method of claim 15, wherein the updating of the first map data further comprises:

updating the corresponding one of the sorted second segments in the third segment loaded to the memory, and then storing the third segment into the second memory block.

17. The operating method of claim 13, wherein:

the first segments in the segment list have a logical address offset therebetween; and

the second segments are sorted for each of the first segments, based on the logical address offset.

18. The operating method of claim 12, wherein the second segments are sorted for each of the first segments, in a logical address sequence.

19. The operating method of claim 11, wherein:

the first map data comprise logical information corresponding to a data storage to the first memory block; and

the second map data comprise physical information corresponding to the data storage to the first memory block.

20. The operating method of claim 11, further comprising:

checking logical information and physical information on read data corresponding to a read command received from the host, through the segment list; and

reading the read data from the first memory block, using the checked logical information and physical information.