MEMORY SYSTEM AND OPERATING METHOD THEREOF

• US 20170139646A1
• Filed: 04/11/2016
• Published: 05/18/2017
• Est. Priority Date: 11/18/2015
• Status: Active Grant

• Current Assignee: SK Hynix Inc.
• Original Assignee: SK Hynix Inc.
• Inventors: LEE, Jong-Min
• Granted Patent: US 10,310,769 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0802 Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
• CPC Class Codes: G06F 12/1009 using page tables, e.g. page table structures
• CPC Class Codes: G06F 12/1018 involving hashing techniques, e.g. inverted page tables
• CPC Class Codes: G06F 2212/1016 Performance improvement
• CPC Class Codes: G06F 2212/60 Details of cache memory
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 3/0608 Saving storage space on storage systems
• CPC Class Codes: G06F 3/0626 Reducing size or complexity of storage systems
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 3/0685 Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays

Abstract

A memory system may include a memory device comprising a plurality of memory blocks each having a plurality of pages; and a controller suitable for storing data in a first memory block among the memory blocks, storing map data of the data in a second memory block among the memory blocks, and scanning the map data by performing filtering on logical information of the data in response to a command.

Claims

1. A memory system comprising:

a memory device comprising a plurality of memory blocks each having a plurality of pages; and

a controller suitable for storing data in a first memory block among the memory blocks, storing map data of the data in a second memory block among the memory blocks, and scanning the map data by performing filtering on logical information of the data in response to a command.

2. The memory system of claim 1, wherein the controller includes:

a memory suitable for storing a bit map for the logical Information of the data,

wherein the controller generates the bit map for the logical information of the data when storing the map data, and performs the filtering through the bit map stored in the memory.

3. The memory system of claim 2, wherein the controller generates an ID for the logical information of the data by shifting and grouping the logical information of the data.

4. The memory system of claim 3, wherein the controller generates the ID for the logical information of the data as the bit map through multiple hashes.

5. The memory system of claim 4, wherein the controller includes:

a filter suitable for performing the filtering,

wherein the controller registers the bit map in a bit array of the filter when storing the map data.

6. The memory system of claim 1, wherein the controller loads map segments of the map data and a map list for the map segments to a memory of the controller, and checks whether a first map segment corresponding to logical information of a command data corresponding to the command exists in the map list, through the filtering.

7. The memory system of claim 6, wherein when the first map segment exists in the map list, the controller checks physical information of the first map segment by scanning the map segments.

8. The memory system of claim 7, wherein the controller performs a command operation corresponding to the command in the memory blocks, based on the physical information.

9. The memory system of claim 7, wherein the physical information comprises a physical page number (PPN) corresponding to the logical information of the command data.

10. The memory system of claim 1, wherein the logical information of the data comprises a logical page number (LPN) of the data stored in the first memory block.

11. An operating method of a memory system comprising a plurality of memory blocks each having a plurality of pages, comprising:

storing data in a first memory block among the memory blocks, and storing map data of the data in a second memory block among the memory blocks; and

scanning the map data by performing filtering on logical information of the data in response to a command.

12. The operating method of claim 11, the storing of the map data comprising:

generating a bit map for the logical information of the data; and

storing the bit map in a memory of a controller.

13. The operating method of claim 12, wherein the scanning of the map data comprises:

performing the filtering through the bit map.

14. The operating method of claim 12, wherein the generating of the bit map comprises:

generating an ID for the logical information of the data by shifting and grouping the logical information of the data; and

generating the ID for the logical information of the data as the bit map through multiple hashes.

15. The operating method of claim 14, wherein the storing of the bit map in the memory of the controller comprises:

registering the bit map in a bit array of a filter which performs the filtering.

16. The operating method of claim 11, the scanning of the map data comprising:

loading map segments of the map data and a map list for the map segments to a memory of a controller; and

checking whether a first map segment corresponding to logical information of a command data corresponding to the command exists in the map list, through the filtering.

17. The operating method of claim 16, wherein the scanning of the map data further comprises:

checking physical information of the first map segment by scanning the map segments, when the first map segment exists in the map list.

18. The operating method of claim 17, further comprising:

performing a command operation corresponding to the command in the memory blocks, based on the physical information.

19. The operating method of claim 17, wherein the physical information comprises a physical page number (PPN) corresponding to the logical information of the command data.

20. The operating method of claim 11, wherein the logical information of the data comprises a logical page number (LPN) of the data stored in the first memory block.