Butted Body Contact for SOI Transistor
First Claim
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1. A field-effect transistor (FET) comprising:
- a drain region having a first conductivity type;
a source region having the first conductivity type;
a gate polysilicon structure defining a body region, the body region having a second conductivity type;
at least one body contact region of the second conductivity type in contact with the source region and separate from the body region;
and at least one body tab of the second conductivity type in contact with the body region and the at least one body contact region, configured to electrically connect the at least one body contact region to the body region.
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Abstract
Systems, methods, and apparatus for an improved body tie construction that produces all the benefits of conventional body tie (H-gate, T-gate), without the limitations and degradations associated with those constructions are described. The improved body tie construction is configured to have a lower resistance body tie when the transistor is “off” (Vg approximately 0 volts). When the transistor is “on” (Vg>Vt), the resistance to the body tie is much higher, reducing the loss of performance associated with presence of body tie.
18 Citations
65 Claims
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1. A field-effect transistor (FET) comprising:
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a drain region having a first conductivity type; a source region having the first conductivity type; a gate polysilicon structure defining a body region, the body region having a second conductivity type; at least one body contact region of the second conductivity type in contact with the source region and separate from the body region; and at least one body tab of the second conductivity type in contact with the body region and the at least one body contact region, configured to electrically connect the at least one body contact region to the body region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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22. A multi-finger field-effect transistor (FET) comprising:
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a first gate polysilicon structure defining a first body region, the first body region having a first conductivity type; a second gate polysilicon structure defining a second body region, the second body region having the first conductivity type; a first drain region adjacent to the first body region having a second conductivity type; a second drain region adjacent to the second body region having the second conductivity type; a common source region adjacent to the first and the second body regions having the second conductivity type; at least one body contact region of the first conductivity type formed within the common source region and separate from the first and the second body regions; at least one first body tab of the first conductivity type in contact with the first body region and the at least one body contact region, configured to electrically connect the at least one body contact region to the first body region, and at least one second body tab of the first conductivity type in contact with the second body region and the at least one body contact region, configured to electrically connect the at least one body contact region to the second body region. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29, 30, 31, 63)
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32. A circuital arrangement comprising:
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a first gate polysilicon structure defining a first body region, the first body region having a first conductivity type; a second gate polysilicon structure defining a second body region, the second body region having the first conductivity type; a first drain region associated to the first body region having a second conductivity type; a first source region associated to the first body region having the second conductivity type; a second source region associated to the second body region having the second conductivity type; a second drain region associated to the second body region having the second conductivity type, the first source region and the second drain region defining a common source/drain region having the second conductivity type; at least one first body contact region of the first conductivity type in contact with the second source region and separate from the first and the second body regions; at least one first body tab of the first conductivity type in contact with the second body region and the at least one first body contact region configured to electrically connect the at least one first body contact region to the second body region. - View Dependent Claims (33, 34, 35, 36, 37, 38)
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39. A transistor device comprising:
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an electrically insulating layer; a first region having a first conductivity type; a second region having the first conductivity type; a conduction channel between the first region and the second region, the conduction channel having a second conductivity type; at least one body contact region of the second conductivity type separate from the conduction channel; and at least one body tab of the second conductivity type in contact with the conduction channel and the at least one body contact region configured to resistively connect the at least one body contact region to the conduction channel with a resistance value dependent on a mode of operation of the transistor device, wherein; the first region, the second region, the conduction channel, the at least one body contact region and the at least one body tab are formed atop the electrically insulating layer, thereby making contact with the insulating layer. - View Dependent Claims (40, 41, 42, 43, 44, 45, 46, 47)
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48. A field-effect transistor (FET) comprising:
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a drain region having a first conductivity type; a source region having the first conductivity type; a gate polysilicon structure defining a body region, the body region having a second conductivity type; at least one body contact region of the second conductivity type separate from the body region; and at least one body tab of the second conductivity type in contact with the body region and the at least one body contact region, configured to electrically connect the at least one body contact region to the body region. - View Dependent Claims (49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62)
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64. A method for connecting a body region and a source region of a field-effect transistor (FET), the method comprising:
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resistively connecting, by at least one body tab extending through the source region of the FET, the body region of the FET to a body contact region in contact with the source region, wherein the transistor is fabricated using a silicon-on-insulator (SOI) technology. - View Dependent Claims (65)
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Specification