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NON-VOLATILE BUFFER FOR MEMORY OPERATIONS

  • US 20170147207A1
  • Filed: 11/20/2015
  • Published: 05/25/2017
  • Est. Priority Date: 11/20/2015
  • Status: Active Grant
First Claim
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1. An apparatus, comprising:

  • an on-chip memory controller to interface with an off-chip non-volatile memory device, wherein the on-chip memory controller to comprise a non-volatile buffer, to be formed from a non-volatile memory technology, to store one or more signals and/or states to comprise a memory operation to be received from a processor.

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