INTEGRATED CIRCUIT STRUCTURE AND METHOD WITH SOLID PHASE DIFFUSION
First Claim
1. A method, comprising:
- forming fin semiconductor features on a substrate;
forming a dopant-containing dielectric material layer on sidewalls of the fin semiconductor features and the substrate;
performing a precise material modification (PMM) process to the dopant-containing dielectric material layer, wherein the PMM process includes;
forming a first dielectric material layer over the dopant-containing dielectric material layer;
performing a tilted ion implantation to the first dielectric material layer so that a top portion of the first dielectric material layer is doped to have a modified etch characteristic different from an etch characteristic of a bottom portion of the first dielectric material layer; and
performing an etch process to selectively remove the top portion of the first dielectric material layer and a top portion of the dopant-containing dielectric material layer.
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Accused Products
Abstract
A method includes forming fin semiconductor features on a substrate. A dopant-containing dielectric material layer is formed on sidewalls of the fin semiconductor features and the substrate. A precise material modification (PMM) process is performed to the dopant-containing dielectric material layer. The PMM process includes forming a first dielectric material layer over the dopant-containing dielectric material layer; performing a tilted ion implantation to the first dielectric material layer so that a top portion of the first dielectric material layer is doped to have a modified etch characteristic different from an etch characteristic of a bottom portion of the first dielectric material layer; and performing an etch process to selectively remove the top portion of the first dielectric material layer and the top portion of the dopant-containing dielectric material layer.
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Citations
20 Claims
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1. A method, comprising:
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forming fin semiconductor features on a substrate; forming a dopant-containing dielectric material layer on sidewalls of the fin semiconductor features and the substrate; performing a precise material modification (PMM) process to the dopant-containing dielectric material layer, wherein the PMM process includes; forming a first dielectric material layer over the dopant-containing dielectric material layer; performing a tilted ion implantation to the first dielectric material layer so that a top portion of the first dielectric material layer is doped to have a modified etch characteristic different from an etch characteristic of a bottom portion of the first dielectric material layer; and performing an etch process to selectively remove the top portion of the first dielectric material layer and a top portion of the dopant-containing dielectric material layer. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method, comprising:
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providing a substrate including a plurality of fin elements; depositing a dopant-containing dielectric material layer over sidewalls of the plurality of fin elements and the substrate; forming a first dielectric material layer over the dopant-containing dielectric material layer; modifying a top portion of the first dielectric material layer so that the top portion of the first dielectric material layer has a first etching characteristic different from a second etch characteristic of a bottom portion of the first dielectric material layer; and performing a first etch process to selectively remove the top portion of the first dielectric material layer and a top portion of the dopant-containing dielectric material layer, thereby exposing sidewalls of top portions of the plurality of fin elements. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A method, comprising:
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providing a substrate including a first region having a first plurality of fin elements and a second region having a second plurality of fin elements; forming a first dopant-containing dielectric layer containing a first-type dopant over the first region; forming a second dopant-containing dielectric layer containing a second-type dopant opposite to the first-type dopant over the second region; depositing a first dielectric material layer over the first dopant-containing dielectric layer in the first region and the second dopant-containing dielectric layer in the second region; modifying a top portion of the first dielectric material layer so that the top portion of the first dielectric material layer has a first etching characteristic different from a second etch characteristic of a bottom portion of the first dielectric material layer; and performing a first etch process to selectively remove the top portion of the first dielectric material layer, a first top portion of the first dopant-containing dielectric material layer, and a second top portion of the second dopant-containing dielectric material layer. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification