OPTOELECTRONIC SEMICONDUCTOR CHIP AND METHOD OF PRODUCING SAME

• US 20170162749A1
• Filed: 05/20/2015
• Published: 06/08/2017
• Est. Priority Date: 05/26/2014
• Status: Abandoned Application

• Current Assignee: Osram Opto Semiconductors GmbH (Ams-Osram AG)
• Original Assignee: Osram Opto Semiconductors GmbH (Ams-Osram AG)
• Inventors: Schmid, Wolfgang, Sundgren, Petrus
• Application Number:
  US15/309,938
• Publication Number:
  US 20170162749A1
• Time in Patent Office: Days
• CPC Class Codes: H01L 22/26 Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement endpoint detection arrangements in CMP apparatus B24B37/013, in discharge apparatus H01J37/32
• CPC Class Codes: H01L 33/0062 for devices with an active region comprising only III-V compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/02 characterised by the semiconductor bodies
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers
• CPC Class Codes: H01L 33/30 containing only elements of Group III and Group V of the Periodic Table
• CPC Class Codes: H01L 33/387 with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
• CPC Class Codes: H01S 2301/17 Semiconductor lasers comprising special layers
• CPC Class Codes: H01S 5/209 special etch stop layers
• CPC Class Codes: H01S 5/22 having a ridge or stripe structure

Abstract

An optoelectronic semiconductor chip which is a light emitting diode includes a semiconductor layer sequence having an n-conducting layer sequence, a p-conducting layer sequence, an active zone, at least one etching signal layer, and an etching structure, wherein the etching structure extends at least right into the etching signal layer, the etching signal layer has a signal constituent, the active zone generates radiation and is based on InAlGaP or on InAlGaAs, the etching signal layer is situated in the p-conducting layer sequence and is based on In_1−x−yAl_yGa_xP or on In_1−x−yAl_yGa_xAs where x+y<1, the signal constituent is Ga and 0.005≦x≦0.2, the signal constituent is not present in the layer adjoining the etching signal layer in a direction toward the etching structure, a thickness of the etching signal layer is 50 nm to 800 nm.

Claims

1-14. -14. (canceled)

15. An optoelectronic semiconductor chip which is a light emitting diode comprising a semiconductor layer sequence, wherein the semiconductor layer sequence has:

an n-conducting layer sequence,

a p-conducting layer sequence,

an active zone situated between the n-conducting layer sequence and the p-conducting layer sequence,

at least one etching signal layer in the p-conducting layer sequence and/or in the n-conducting layer sequence, and

an etching structure at a side of the etching signal layer facing away from the active zone, wherein

the etching structure extends at least right into the etching signal layer,

the etching signal layer has a signal constituent,

the active zone generates radiation and is based on InAlGaP or on InAlGaAs,

the etching signal layer is situated in the p-conducting layer sequence and is based on In<sub>1−

x−

y</sub>Al_yGa_xP or on In<sub>1−

x−

y</sub>Al_yGa_xAs where x+y<

1,

the signal constituent is Ga and 0.005≦

x≦

0.2,

the signal constituent is not present in the layer adjoining the etching signal layer in a direction toward the etching structure,

a thickness of the etching signal layer is 50 nm to 800 nm, and

as a result of the etching structure a material of the etching signal layer is partly removed.

17. The optoelectronic semiconductor chip according to claim 15, wherein a concentration of the signal constituent in the etching signal layer is constant, with a tolerance of at most 20% of a mean concentration of the signal constituent in the etching signal layer.

18. The optoelectronic semiconductor chip according to claim 15, wherein the etching signal layer is directly adjacent to the active zone, in a direction toward the etching structure.

19. The optoelectronic semiconductor chip according to claim 15, wherein the etching signal layer is spaced apart from the active zone.

20. The optoelectronic semiconductor chip according to claim 19,

wherein a respective further layer is situated on both sides of the etching signal layer and these further layers have an identical material composition, and

the further layers are free of the signal constituent.

21. The optoelectronic semiconductor chip according to claim 19,

wherein a ramp layer based on In₁₋

a−

bAl_bGa_aP or on In<sub>1−

a−

b</sub>Al_bGa_aAs where a+b<

1 is situated between the etching signal layer and the active zone in the p-type layer sequence,

in a direction away from the active zone in the ramp layer, the Al content b rises monotonically or strictly monotonically and the ramp layer directly adjoins the active zone,

at the active zone it holds true that;

0.15≦

a≦

0.35 and 0.15≦

b≦

0.35 and 0.4≦

a+b≦

0.6, and

at a side of the ramp layer facing away from the active zone it holds true that;

a≦

0.05 and 0.4≦

b≦

0.6.

22. The optoelectronic semiconductor chip according to claim 21, wherein in the ramp layer the Al content b changes linearly and the indium content 1−

a−

b is constant, and a thickness of the ramp layer is 50 nm to 500 nm.

23. The optoelectronic semiconductor chip according to claim 15, further comprising a p-type electrode at the p-conducting layer sequence and an n-type electrode at the n-conducting layer sequence,

wherein the electrodes are structured to form a multiplicity of strips or islands and the strips or the islands of both electrodes are arranged in a manner free of overlap in a radiation-generating region, as seen in plan view, and

the etching structure is present in the p-conducting layer sequence in the radiation-generating region only between adjacent strips or islands of the p-type electrode.

24. The optoelectronic semiconductor chip according to claim 23, wherein a roughening is present between adjacent strips of the n-type electrode in the n-conducting layer sequence.

25. The optoelectronic semiconductor chip according to claim 15, which is free of a growth substrate of the semiconductor layer sequence,

wherein radiation is coupled out at the n-conducting layer sequence, and wherein a carrier is situated at the p-conducting layer sequence.

26. The optoelectronic semiconductor chip according to claim 15, wherein

the etching signal layer is based on In₁₋

x−

yAl_yGa_xP where 0.35≦

y≦

0.55 and where 0.02≦

x≦

0.15 and has a thickness of 150 nm to 500 nm and is doped with Mg with a concentration of 1×

10¹⁶ cm<sup>−

3</sup> to 3×

10¹⁸ cm<sup>−

3</sup>,

the p-type layer adjoining the etching signal layer is based on In<sub>1−

x−

y</sub>Al_yGa_xP where 0.4≦

y≦

0.6 and where x≦

0.001,

a distance between the etching signal layer and the active zone is 200 nm to 600 nm,

the etching structure has a mean depth of 250 nm to 5 μ

m, and

a distance between the etching structure and the active zone is 100 nm to 500 nm.

27. A method in which an optoelectronic semiconductor chip according to claim 15 is produced comprising:

providing the semiconductor layer sequence having the n-conducting layer sequence, the p-conducting layer sequence, the active zone and the etching signal layer,

producing the etching structure by dry-chemical etching of the semiconductor layer sequence, and

completing the semiconductor chip, wherein

during the etching measurement is carried out toward the signal constituent of the etching signal layer, and

the etching is ended by an evaluation of the measurement of the signal constituent.

28. The method according to claim 27,

wherein the etching is etching with inductively coupled plasma, and

during the etching the etching signal layer is completely penetrated in places.

29. An optoelectronic semiconductor chip comprising a semiconductor layer sequence, wherein the semiconductor layer sequence has:

an n-conducting layer sequence,

a p-conducting layer sequence,

an active zone situated between the n-conducting layer sequence and the p-conducting layer sequence,

at least one etching signal layer in the p-conducting layer sequence and/or in the n-conducting layer sequence,

an etching structure at a side of the etching signal layer facing away from the active zone,

the etching structure extends at least right into the etching signal layer, and

the etching signal layer has a signal constituent reduced by at least a factor of two in a layer adjoining the etching signal layer in a direction toward the etching structure.

16. The optoelectronic semiconductor chip according to claim 29,

wherein the active zone generates radiation and is based on InAlGaP or on InAlGaAs, wherein

the etching signal layer is situated in the p-conducting layer sequence and is based on In₁₋

x−

yAl_yGa_xP or on In<sub>1−

x−

y</sub>Al_yGa_xAs where x+y<

1,

the signal constituent is Ga and 0.005≦

x≦

0.2,

the signal constituent is not present in the layer adjoining the etching signal layer in a direction toward the etching structure, and

a thickness of the etching signal layer is 50 nm to 800 nm.