CHIPS INCLUDING CLASSICAL AND QUANTUM COMPUTING PROCESSORS

• US 20170177534A1
• Filed: 03/23/2015
• Published: 06/22/2017
• Est. Priority Date: 03/21/2014
• Status: Active Grant

• Current Assignee: Google LLC (Alphabet Inc.)
• Original Assignee: Google Inc. (Alphabet Inc.)
• Inventors: MOHSENI, Masoud, NEVEN, Hartmut
• Granted Patent: US 10,671,559 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 13/4068 Electrical coupling
• CPC Class Codes: G06F 15/80 comprising an array of processing units with common control, e.g. single instruction multiple data processors G06F15/82 takes precedence ; for correlation function computation G06F17/15
• CPC Class Codes: G06N 10/00 Quantum computing, i.e. information processing based on quantum-mechanical phenomena
• CPC Class Codes: G06N 10/20 Models of quantum computing, e.g. quantum circuits or universal quantum computers
• CPC Class Codes: G06N 10/40 Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
• CPC Class Codes: G06N 10/60 Quantum algorithms, e.g. based on quantum optimisation, quantum Fourier or Hadamard transforms
• CPC Class Codes: H01P 5/08 for linking dissimilar lines or devices H01P1/16, H01P5/04 take precedence; linking lines of the same kind but with different dimensions H01P5/02
• CPC Class Codes: H03K 19/195 using superconductive devices
• CPC Class Codes: H10N 60/12 Josephson-effect devices
• CPC Class Codes: H10N 60/805 for Josephson-effect devices
• CPC Class Codes: H10N 69/00 Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

An apparatus includes a substrate, a classical computing processor formed on the substrate, a quantum computing processor formed on the substrate, and one or more coupling components between the classical computing processor and the quantum computing processor, the one or more coupling components being formed on the substrate and being configured to allow data exchange between the classical computing processor and the quantum computing processor.

Claims

1. An apparatus comprising:

a substrate;

a classical computing processor formed on the substrate;

a quantum computing processor formed on the substrate; and

one or more coupling components between the classical computing processor and the quantum computing processor, the one or more coupling components being formed on the substrate and being configured to allow data exchange between the classical computing processor and the quantum computing processor.

2. The apparatus of claim 1, wherein the quantum computing processor is configured to receive output data from the classical computing processor and use the received output data as input data for a quantum computation to be carried out by the quantum computing processor.

3. The apparatus of claim 2, wherein the quantum computing processor is configured to be programmed using the output data.

4. The apparatus of claim 1, wherein the one or more coupling components connect an output of the classical computing processor to an input of the quantum computing processor.

5. The apparatus of claim 1, wherein the one or more coupling components connect an output of the quantum computing processor to an input of the classical computing processor.

6. The apparatus of claim 1, wherein each of the quantum computing processor and the classical computing processor comprises a superconducting quantum interference device (SQUID).

7. The apparatus of claim 1, wherein each of the quantum computing processor and the classical computing processor comprises at least one Josephson junction and an inductor.

8. The apparatus of claim 1, wherein the one or more coupling components comprise a superconducting wire.

9. The apparatus of claim 1, wherein the classical computing processor comprises a plurality of quantum logic gates arranged according to Reciprocal Quantum Logic (RQL).

10. The apparatus of claim 1, wherein each of the quantum computing processor and the classical computing processor comprises electronic components comprising a superconducting material.

11. The apparatus of claim 10, wherein the superconducting material comprises aluminum, niobium or a lead alloy.

12. The apparatus of claim 1, wherein the one or more coupling components comprise an array of superconducting cavity quantum electrodynamics (QED) transmission lines.

13. A system comprising:

a processor device; and

a memory storage device accessible by the processor device, wherein the processor device comprises a substrate, a classical computing processor and a quantum computing processor arranged on the substrate, and one or more coupling components coupled arranged on the substrate, wherein the one or more coupling components are configured to allow data exchange between the classical computing processor and the quantum computing processor.