HIGH SPEED ROLLING IMAGE SENSOR WITH ADM ARCHITECTURE AND METHOD OF IMPLEMENTING THEREOF
First Claim
1. An image sensor comprising:
- a pixel array disposed in a first semiconductor die, wherein the pixel array is partitioned into a plurality of pixel sub-arrays (PSAs), wherein each one of the plurality of PSAs includes a plurality of pixels, wherein the pixel array includes a plurality of pixel groups that include pixels that are non-contiguous, wherein each pixel group includes pixels from different PSAs;
a plurality of readout circuits disposed in a second semiconductor die, wherein the plurality of readout circuits respectively include analog-to-digital converter and memory unit tiles (ADMs), wherein each one of the pixel groups is coupled to a corresponding one of the plurality of ADMs, the ADMs respectively include (i) analog-to-digital (ADC) circuits that convert the image data from the pixel groups from analog to digital to obtain ADC outputs, and (ii) memory units to store the ADC outputs; and
a plurality of conductors coupling the pixel array to the plurality of ADMs, wherein the plurality of conductors includes a number of conductors per column of the pixel array.
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Abstract
High speed rolling image sensor includes pixel array disposed in first semiconductor die, readout circuits disposed in second semiconductor die and conductors. Pixel array is partitioned into pixel sub-arrays (PSAs). Each of the PSAs includes a plurality of pixels. Pixel groups include pixels that are non-contiguous, non-overlapping and distinct. Each pixel group includes pixels from different PSAs. Each pixel group is coupled to a corresponding analog-to-digital converter and memory unit tiles (ADMs) respectively included in readout circuits. ADMs respectively include (i) analog-to-digital (ADC) circuits that convert the image data from pixel groups from analog to digital to obtain ADC outputs, and (ii) memory units to store ADC outputs. Conductors are coupling pixel array to ADMs. Conductors include number of conductors per column of pixel array. Number of conductors per column of pixel array may be equal to number of pixels in PSA arranged in same column. Other embodiments are described.
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Citations
20 Claims
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1. An image sensor comprising:
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a pixel array disposed in a first semiconductor die, wherein the pixel array is partitioned into a plurality of pixel sub-arrays (PSAs), wherein each one of the plurality of PSAs includes a plurality of pixels, wherein the pixel array includes a plurality of pixel groups that include pixels that are non-contiguous, wherein each pixel group includes pixels from different PSAs; a plurality of readout circuits disposed in a second semiconductor die, wherein the plurality of readout circuits respectively include analog-to-digital converter and memory unit tiles (ADMs), wherein each one of the pixel groups is coupled to a corresponding one of the plurality of ADMs, the ADMs respectively include (i) analog-to-digital (ADC) circuits that convert the image data from the pixel groups from analog to digital to obtain ADC outputs, and (ii) memory units to store the ADC outputs; and a plurality of conductors coupling the pixel array to the plurality of ADMs, wherein the plurality of conductors includes a number of conductors per column of the pixel array. - View Dependent Claims (2, 3, 4, 5)
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6. An image sensor comprising:
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a pixel array disposed in a first semiconductor die, wherein the pixel array is partitioned into a plurality of pixel sub-arrays (PSAs), wherein each one of the plurality of PSAs includes a plurality of pixels, wherein the pixel array includes a plurality of pixel groups that include pixels that are non-contiguous, non-overlapping and distinct, wherein each pixel group includes pixels from different PSAs; a plurality of readout circuits disposed in a second semiconductor die, wherein the plurality of readout circuits respectively include analog-to-digital converter and memory unit tiles (ADMs), wherein each one of the pixel groups is coupled to a corresponding one of the plurality of ADMs, the ADMs respectively include (i) analog-to-digital (ADC) circuits that convert the image data from the pixel groups from analog to digital to obtain ADC outputs, and (ii) memory units to store the ADC outputs; and a plurality of conductors coupling the pixel array to the plurality of ADMs, wherein the plurality of conductors includes a number of conductors per column of the pixel array, wherein the number of conductors per column of the pixel array is equal to the number of pixels in the PSA that are arranged in a same column. - View Dependent Claims (7, 8, 9, 10, 11, 12)
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13. A method of implementing a high speed rolling image sensor comprising:
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capturing by a pixel array image data, wherein the pixel array is disposed in a first semiconductor die, wherein the pixel array is partitioned into a plurality of pixel sub-arrays (PSAs), where the pixel array includes a plurality of pixel groups, wherein each one of the plurality of pixel groups includes a plurality of pixels that are non-contiguous, non-overlapping and distinct, wherein each pixel group includes pixels from different PSAs; acquiring by a plurality of readout circuits disposed in a second semiconductor die the image data from the pixel array via a plurality of conductors, wherein each one of the pixel groups is coupled to a corresponding one of the plurality of analog-to-digital converter and memory unit tiles (ADMs) respectively included in readout circuits, wherein the plurality of conductors couple the pixel array to the plurality of ADMs, wherein the plurality of conductors includes a number of conductors per column of the pixel array, wherein the number of conductors per column of the pixel array is equal to the number of pixels in the PSA that are arranged in a same column, converting by a plurality of analog-to-digital (ADC) circuits included in the ADMs, respectively, the image data from the pixel groups from analog to digital to obtain ADC outputs; and storing the ADC outputs from each of the ADC circuits in memory units, respectively, wherein the plurality of ADMs respectively include the memory units. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification