MEMORY WRITE PROTECTION FOR MEMORY CORRUPTION DETECTION ARCHITECTURES
First Claim
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1. A processing system comprising:
- a processor core comprising a register to store an address of a memory corruption detection (MCD) table, wherein the processing core is to;
receive, from an application, a memory store request to store data in a first portion of a contiguous memory block of a memory; and
send, to the application, a fault message when a fault event associated with the first portion occurs in view of a protection mode of the first portion.
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Abstract
Memory corruption detection technologies are described. A system on a chip (SoC) may include a memory device and a memory controller. The memory device may store data from an application, wherein the memory device comprises a memory corruption detection (MCD) table. The memory controller may be coupled to the memory device. The memory controller may allocate a contiguous memory block in the memory and write a MCD word into the MCD table. The MCD word may include a write protection indicator that indicates a protection mode of a first portion of the contiguous memory block.
10 Citations
20 Claims
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1. A processing system comprising:
a processor core comprising a register to store an address of a memory corruption detection (MCD) table, wherein the processing core is to; receive, from an application, a memory store request to store data in a first portion of a contiguous memory block of a memory; and send, to the application, a fault message when a fault event associated with the first portion occurs in view of a protection mode of the first portion. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A system on a chip (SoC) comprising:
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a memory device to store data from an application, wherein the memory device comprises a memory corruption detection (MCD) table; and a memory controller coupled to the memory device, the memory controller to; allocate a contiguous memory block in the memory; and write a MCD word into the MCD table, wherein the MCD word includes a write protection indicator that indicates a protection mode of a first portion of the contiguous memory block. - View Dependent Claims (14, 15, 16)
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17. A processing system comprising:
a processor core comprising a register to store an address of a memory corruption detection (MCD) table, wherein the processing core is to; write a word into the MCD table, wherein the word comprises a write protection indicator that indicates a protection mode of a first portion of a contiguous memory block in a memory; receive, from an application, a memory store request to store data in the first portion of the contiguous memory block; and send, to the application, a fault message when a fault event associated with the first portion occurs in view of the protection mode of the first portion of the contiguous memory block. - View Dependent Claims (18, 19, 20)
Specification