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ZERO CACHE MEMORY SYSTEM EXTENSION

  • US 20170192896A1
  • Filed: 12/31/2015
  • Published: 07/06/2017
  • Est. Priority Date: 12/31/2015
  • Status: Abandoned Application
First Claim
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1. A device comprising:

  • a processor;

    a memory communicatively coupled to the processor; and

    a cache system communicatively coupled to the processor and the memory, wherein the cache system includes;

    a data cache configured to store cache tags and data bytes associated with cache lines that include at least one non-zero value; and

    a zero cache configured to store cache tags associated with zero cache lines.

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