GROWTH OF CUBIC CRYSTALLINE PHASE STRUCTURE ON SILICON SUBSTRATES AND DEVICES COMPRISING THE CUBIC CRYSTALLINE PHASE STRUCTURE
First Claim
1. A method of forming a transistor, the method comprising:
- providing a substrate comprising a first material portion and a single crystalline silicon layer on the first material portion, the substrate further comprising a major front surface, a major backside surface opposing the major front surface, and a plurality of grooves positioned in the major front surface exposing {111} faces of the single crystalline silicon layer;
depositing a buffer layer in one or more of the plurality of grooves;
epitaxially growing a semiconductor material over the buffer layer and in the one or more plurality of grooves, the epitaxially grown semiconductor material comprising a hexagonal crystalline phase layer and a cubic crystalline phase structure disposed over the hexagonal crystalline phase layer, one or both of the hexagonal crystalline phase layer and the cubic crystalline phase structure optionally being doped;
forming a gate over the cubic crystalline phase structure, the gate comprising an optional gate dielectric and a gate electrode; and
forming a source contact and electrode and a drain contact and electrode on the semiconductor material.
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Abstract
A transistor comprises a substrate comprising a Group III/V compound semiconductor material having a cubic crystalline phase structure positioned on a hexagonal crystalline phase layer having a first region and a second region, the cubic crystalline phase structure being positioned between the first region and the second region of the hexagonal crystalline phase layer. A source region and a drain region are both positioned in the Group III/V compound semiconductor material. A channel region is in the Group III/V compound semiconductor material. A gate is over the channel region. An optional backside contact can also be formed. A source contact and electrode are positioned to provide electrical contact to the source region. A drain contact and electrode are positioned to provide electrical contact to the drain region. Methods of forming transistors are also disclosed.
32 Citations
19 Claims
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1. A method of forming a transistor, the method comprising:
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providing a substrate comprising a first material portion and a single crystalline silicon layer on the first material portion, the substrate further comprising a major front surface, a major backside surface opposing the major front surface, and a plurality of grooves positioned in the major front surface exposing {111} faces of the single crystalline silicon layer; depositing a buffer layer in one or more of the plurality of grooves; epitaxially growing a semiconductor material over the buffer layer and in the one or more plurality of grooves, the epitaxially grown semiconductor material comprising a hexagonal crystalline phase layer and a cubic crystalline phase structure disposed over the hexagonal crystalline phase layer, one or both of the hexagonal crystalline phase layer and the cubic crystalline phase structure optionally being doped; forming a gate over the cubic crystalline phase structure, the gate comprising an optional gate dielectric and a gate electrode; and forming a source contact and electrode and a drain contact and electrode on the semiconductor material. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A transistor comprising:
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a substrate comprising a Group III/V compound semiconductor material having a cubic crystalline phase structure positioned on a hexagonal crystalline phase layer having a first region and a second region, the cubic crystalline phase structure being positioned between the first region and the second region of the hexagonal crystalline phase layer; a source region and a drain region, both the source region and the drain region positioned in the Group III/V compound semiconductor material; a channel region in the Group III/V compound semiconductor material; a gate over the channel region; an optional backside contact; and a source contact and electrode and a drain contact and electrode, the source contact and electrode positioned to provide electrical contact to the source region and the drain contact and electrode positioned to provide electrical contact to the drain region. - View Dependent Claims (13, 14, 15, 16, 17)
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18. A MOSFET transistor comprising:
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a substrate comprising a Group III/V compound semiconductor material having a cubic crystalline phase formed in a groove, the groove comprising sidewalls having exposed {111} faces of a crystalline semiconductor; a source region and a drain region in the cubic crystalline phase; a gate dielectric on the cubic crystalline phase between the source region and the drain region; and a gate electrode on the gate dielectric. - View Dependent Claims (19)
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Specification