ULTRA LOW VOLTAGE RING OSCILLATOR WITH REDUNDANT INVERTER
First Claim
Patent Images
1. A redundant inverter comprising:
- a redundant inverter input terminal for receiving an inverter input signal;
a redundant inverter output terminal for generating an inverter output signal;
an input module, the input module includesa high section which includes a first input inverter having a first p-type transistor and a first n-type transistor coupled in series between a first input inverter high power source and a first input inverter low power source, the first input inverter includes a first inverter input terminal coupled to the redundant inverter input terminal and a first inverter output terminal which serves as a high section output terminal, anda low section with a second input inverter having a second p-type transistor and a second n-type transistor coupled in series between a second input inverter high and low power sources, the second input inverter includes a second inverter input terminal coupled to the redundant inverter input terminal and a second inverter output terminal which serves as a low section output terminal; and
an output module with an output inverter, the output inverter includesan output p-type transistor and an output n-type transistor coupled in series between the first inverter output terminal and the second inverter output terminal,a first output inverter terminal coupled to the redundant inverter output terminal, anda second output inverter terminal coupled to the redundant inverter input terminal.
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Abstract
Redundant inverters with multiple inverter stages enable lower operating voltages to be used. For example, the use of multiple inverter stages produces a strong “0” or a strong “1” output signal. The strong output signal facilitates self-oscillation of a ring oscillator at lower voltages.
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Citations
20 Claims
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1. A redundant inverter comprising:
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a redundant inverter input terminal for receiving an inverter input signal; a redundant inverter output terminal for generating an inverter output signal; an input module, the input module includes a high section which includes a first input inverter having a first p-type transistor and a first n-type transistor coupled in series between a first input inverter high power source and a first input inverter low power source, the first input inverter includes a first inverter input terminal coupled to the redundant inverter input terminal and a first inverter output terminal which serves as a high section output terminal, and a low section with a second input inverter having a second p-type transistor and a second n-type transistor coupled in series between a second input inverter high and low power sources, the second input inverter includes a second inverter input terminal coupled to the redundant inverter input terminal and a second inverter output terminal which serves as a low section output terminal; and an output module with an output inverter, the output inverter includes an output p-type transistor and an output n-type transistor coupled in series between the first inverter output terminal and the second inverter output terminal, a first output inverter terminal coupled to the redundant inverter output terminal, and a second output inverter terminal coupled to the redundant inverter input terminal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A redundant inverter comprising:
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a redundant inverter input terminal for receiving an inverter input signal; a redundant inverter output terminal for generating an inverter output signal; an input module, the input module includes inverters arranged into a high section generating a high section output signal at a high section output terminal, a low section generating a low section output signal at a low section output terminal, and wherein in response to a logic 1 input signal at the redundant inverter input terminal, the high section is configured to generate a weak “
0”
at the high section output terminal, andthe low section is configured to generate a strong “
0”
at the low section output terminal, andin response to a logic 0 input signal at the redundant inverter input terminal, the high section is configured to generate a strong “
1”
at the high section output terminal, andthe low section is configured to generate a weak “
1”
at the low section output terminal;an output module with an output inverter, the output inverter includes an output inverter high power source terminal coupled to the high section output terminal, an output inverter low power source terminal coupled to the low section output terminal, an output inverter input terminal coupled to the redundant inverter input terminal, and an output inverter output terminal coupled to the redundant inverter output terminal. - View Dependent Claims (17, 18, 19)
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20. A ring oscillator circuit comprising a ring oscillator module having a plurality of redundant inverters connected in series to form a ring configuration, wherein a last of the redundant inverter is series connected to a first of the redundant inverter to form a ring, wherein each redundant inverter comprises:
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a redundant inverter input terminal for receiving an inverter input signal; a redundant inverter output terminal for generating an inverter output signal; an input module, the input module includes inverters arranged into a high section generating a high section output signal at a high section output terminal, a low section generating a low section output signal at a low section output terminal, and wherein in response to a logic 1 input signal at the redundant inverter input terminal, the high section is configured to generate a weak “
0”
at the high section output terminal, andthe low section is configured to generate a strong “
0”
at the low section output terminal, andin response to a logic 0 input signal at the redundant inverter input terminal, the high section is configured to generate a strong “
1”
at the high section output terminal, andthe low section is configured to generate a weak “
1”
at the low section output terminal;an output module with an output inverter, the output inverter includes an output inverter high power source terminal coupled to the high section output terminal, an output inverter low power source terminal coupled to the low section output terminal, an output inverter input terminal coupled to the redundant inverter input terminal, and an output inverter output terminal coupled to the redundant inverter output terminal.
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Specification