OVER-CURRENT PROTECTION CIRCUIT AND METHOD FOR VOLTAGE REGULATORS

• US 20170201086A1
• Filed: 05/18/2016
• Published: 07/13/2017
• Est. Priority Date: 01/11/2016
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: CHEN, Gang, REIZIK, Gabor
• Granted Patent: US 10,090,663 B2
• Time in Patent Office: Days
• CPC Class Codes: H02H 3/08 responsive to excess current responsive to abnormal temperature caused by excess current H02H5/04
• CPC Class Codes: H02H 3/087 for dc applications
• CPC Class Codes: H02H 9/025 Current limitation using field effect transistors
• CPC Class Codes: H03K 3/017 Adjustment of width or dutycycle of pulses pulse width modulation H03K7/08 ; to maintain energy constant H03K3/015
• CPC Class Codes: H03K 7/08 Duration or width modulation ; Duty cycle modulation

Abstract

A voltage regulator includes a control circuit, a switch circuit, a first over-current protection circuit, and a second over-current protection circuit. The control circuit generates a pulse-width modulation (PWM) signal having a duty cycle proportional to an output voltage of the voltage regulator. The first over-current protection circuit blocks the PWM signal when an over-current condition exists during an off time of the PWM signal until a low-side switch current-sense level in the switch circuit drops below a set current limit level, while the second over-current protection circuit turns off the PWM signal when an over-current condition occurs during an on time of the PWM signal when a ramp adjusted voltage level added to the low-side switch current-sense level exceeds a summed level of the set current limit level and a set threshold.

Claims

1. An electrical circuit comprising:

a control circuit to generate a PWM signal with a duty cycle proportional to an output voltage of a voltage regulator;

a switch circuit selectively coupling an input of the regulator to an output of the regulator using the PWM signal;

a first over-current protection circuit comprising;

a first comparator having an output, a first input coupled to a low-side current-sense point of the switch circuit, and a second input coupled to a first reference voltage; and

a first gate having an output coupled to the switch circuit, a first input coupled to the control circuit, and a second input coupled to the output of the first comparator; and

a second over-current protection circuit comprising;

a first summing circuit having an output, a first input coupled to the low-side current-sense point of the switch circuit, and a second input coupled to a ramp generator;

a second summing circuit having an output, a first input coupled to the first reference voltage, and a second input coupled to a threshold generator;

a second comparator having an output, a first input coupled to the output of the first summing circuit, and a second input coupled to the output of the second summing circuit; and

a second gate having an output coupled to the switch circuit, a first input coupled to the control circuit, and a second input coupled to the output of the second comparator.

2. The electrical circuit of claim 1, wherein the switch circuit comprises a push-pull switch circuit that includes a high-side metal-oxide-semiconductor field-effect transistor (MOSFET) switch and a low-side MOSFET switch.

3. The electrical circuit of claim 1, comprising a sample-and-hold circuit to store the low-side switch current-sense level during an on time of the PWM signal.

4. The electrical circuit of claim 1, further comprising a circuit sensing the low-side switch current-sense level of the switch circuit using a continuous current-sense point of the voltage regulator.

5. The electrical circuit of claim 1, wherein the ramp generator generates a ramp signal having a slew rate that is proportional to the input voltage of the voltage regulator and a switching frequency of the PWM signal.

6. The electrical circuit of claim 5, wherein the slew rate of the ramp signal is set such that the switching frequency during over-current protection is essentially similar to the switching frequency during normal operation.

7. The electrical circuit of claim 1, wherein the threshold generator is coupled to at least one of the output of the voltage regulator and a second reference voltage.

8. The electrical circuit of claim 1, further comprising a gating circuit to disable operation of the second over-current protection circuit during the off times of the PWM signal.

9. An over-current protection method for an electrical circuit, the method comprising:

blocking a PWM signal to a switch circuit when an over-current condition exists during an off time of the PWM signal when a low-side switch current-sense level obtained from a low-side sense point of the switch circuit exceeds a first reference voltage; and

tuning off the PWM signal to the switch circuit when an over-current condition exists during an on time of the PWM signal when a ramp adjusted voltage level comprising a ramp signal summed with the low-side switch current-sense level exceeds a summed level of the first reference voltage and a threshold voltage.

10. The method of claim 9, further comprising sensing the low-side switch current-sense level of a push-pull switch circuit including an high-side metal-oxide-semiconductor field-effect transistor (MOSFET) switch and a low-side MOSFET switch, the low-side current-sense point comprising a drain terminal of the low-side MOSFET switch.

11. The method of claim 9, further comprising sensing the low-side switch current-sense level of the switch circuit using a continuous current sense point of the voltage regulator.

12. The method of claim 9, further comprising storing the low-side switch current-sense level during an on time of the PWM signal.

13. The method of claim 9, further comprising setting the ramp signal to have a slew rate that is proportional to an input voltage of the voltage regulator and a switching frequency of the PWM signal.

14. The method of claim 13, further comprising setting the slew rate such that the switching frequency during over-current protection is essentially similar to the switching frequency during normal operation.

15. The method of claim 9, further comprising setting the threshold voltage that is proportional to an output voltage level or a second reference voltage.

16. The method of claim 9, further comprising disabling operation of the second over-current protection circuit during the off times of the PWM signal.

17. An electrical circuit comprising:

a control circuit to generate a PWM signal with a duty cycle proportional to an output voltage of the voltage regulator;

a push-pull switch circuit selectively coupling an input of the switch circuit to an output of the switch circuit using the PWM signal, the push-pull switch circuit including a high-side metal-oxide-semiconductor field-effect transistor (MOSFET) switch and a low-side MOSFET switch;

a first over-current protection circuit comprising;

a first comparator having an output, a first input coupled to a low-side switch current-sense point of the push-pull switch circuit, and a second input coupled to a first reference voltage; and

a first gate having an output coupled to the switch circuit, a first input coupled to the control circuit, and a second input coupled to the output of the first comparator; and

a second over-current protection circuit comprising;

a sample-and-hold circuit coupled to the low-side switch current-sense point, the sample-and-hold circuit to store the low-side current-sense voltage level during an on time of the PWM signal;

a first summing circuit having an output, a first input coupled to the sample-and-hold circuit, and a second input coupled to a ramp generator;

a second summing circuit having an output, a first input coupled to the first reference voltage, and a second input coupled to a threshold generator;

a second comparator having an output, a first input coupled to the output of the first summing circuit, and a second input coupled to the output of the second summing circuit; and

a second gate having an output coupled to the switch circuit, a first input coupled to the control circuit, and a second input coupled to the output of the second comparator.

18. The electrical circuit of claim 17, wherein the ramp generator generates a ramp signal having a slew rate that is proportional to the input voltage of the voltage regulator and a switching frequency of the PWM signal.

19. The electrical circuit of claim 18, wherein the slew rate is set such that the switching frequency during over-current protection is essentially similar to the switching frequency during normal operation.