ADAPTIVE LINE EQUALIZER FOR IMPROVING DATA COMMUNICATION OVER LESS THAN PERFECT POWER LINES OR TRANSMISSION LINES

• US 20170214430A1
• Filed: 03/31/2017
• Published: 07/27/2017
• Est. Priority Date: 03/15/2013
• Status: Abandoned Application

• Current Assignee: DockOn AG
• Original Assignee: DockOn AG
• Inventors: BROWN, Forrest James, RADA, Patrick Antoine, DUPUY, Alexandre
• Application Number:
  US15/476,726
• Publication Number:
  US 20170214430A1
• Time in Patent Office: Days
• CPC Class Codes: H04B 17/364 Delay profiles
• CPC Class Codes: H04B 3/10 by pilot signal
• CPC Class Codes: H04B 3/145 variable equalisers
• CPC Class Codes: H04B 3/148 variable equalisers
• CPC Class Codes: H04B 3/462 Testing group delay or phase shift, e.g. timing jitter
• CPC Class Codes: H04B 3/54 Systems for transmission via power distribution lines
• CPC Class Codes: H04L 5/16 Half-duplex systems; Simplex/duplex switching; Transmission of break signals non-automatically inverting the direction of transmission

Abstract

Systems and methods for improving data communication over less than perfect power lines or transmission lines are described. The systems and methods allow for pushing out electrically any null within a frequency range of interest and/or for lossless transmission by providing impedance matching between communication devices and the transmission line. This is achieved by implementing line equalizing modules within the transceivers, at the transmitter side and/or the receiver side, or by plugging, as a stand-alone module, into an electrical outlet within a building. The line equalizing module includes multiple inductor-capacitor cells coupled in cascade where multiple switches allow for selective and concurrent connection between the inductor-capacitor cells. In another embodiment, the line equalizing module includes variable inductor-capacitor cells. The line equalizing module provides a variable propagation delay that allows for stretching electrically the transmission line. Further improvement may achieve by adjusting the operational frequency using an up-conversion or down-conversion operation.

Claims

1. A line equalizing module for a home area networking (HAN) system including two or more devices represented by two or more transceivers, respectively, which are coupled to a transmission line, the line equalizing module comprising:

one or more LC circuits including at least one inductor coupled to at least one capacitor, the one or more LC circuits being configured to provide a variable propagation delay for dynamically correcting imperfection in data communication among the two or more devices, the imperfection being associated with at least one open-ended stub of the transmission line, the variable propagation delay being adjusted to (A) shift one or more nulls in a frequency response to outside a frequency range of interest, or (B) match impedance between the two or more devices and the transmission line, or both (A) and (B).

2. The line equalizing module of claim 1, wherein

the line equalizing module is incorporated into at least one of the two or more transceivers.

3. The line equalizing module of claim 1, wherein

the line equalizing module is coupled to the at least one open-ended stub.

4. The line equalizing module of claim 1, further comprising:

at least one frequency shift circuit configured to shift one or more frequencies of operation by an up-conversion or a down-conversion.

5. The line equalizing module of claim 4, wherein

the at least one frequency shift circuit is incorporated into at least one of the two or more transceivers.

6. The line equalizing module of claim 1, wherein

the at least one line equalizing module is coupled to the transmission line so as to provide a variable matching network for adjusting impedance and phase.

7. The line equalizing module of claim 1, wherein the one more LC circuits is a plurality of LC circuits, and further comprising:

a plurality of switches selectively connecting each LC circuit among the plurality of LC circuits to the transmission line to provide the variable propagation delay.

8. The line equalizing module of claim 7, wherein a ratio of inductance to capacitance for each LC circuit is kept constant.

9. The line equalizing module of claim 1, wherein the one or more LC circuits include one or more variable inductors, each having a variable inductance, coupled to one or more variable capacitors, each having a variable capacitance, to provide the variable propagation delay.

10. The line equalizing module of claim 9, wherein

the one or more variable inductors and the one or more variable capacitors are configured to form a plurality of cascading variable inductor-capacitor LC circuits.

11. The line equalizing module of claim 9, wherein

the one or more variable inductors and the one or more variable capacitors are configured to form at least one variable band-pass filter.

12. The line equalizing module of claim 9, wherein

the one or more variable inductors and the one or more variable capacitors are configured to form at least one variable low-pass filter cascaded with at least one variable high-pass filter.

13. The line equalizing module of claim 1, wherein

at least two of the two or more transceivers are configured to operate in a half-duplex (HDX) mode.

14. The line equalizing module of claim 1, wherein

at least two of the two or more transceivers are configured to operate in a full-duplex (FDX) mode.

15. The line equalizing module of claim 1, wherein

the data communication is performed by a phase-shift keying (PSK) modulation scheme, a frequency-shift keying (FSK) modulation scheme, an amplitude-shift keying (ASK), or a quadrature amplitude modulation (QAM) scheme.