IMAGING DEVICE

• US 20170214871A1
• Filed: 01/16/2017
• Published: 07/27/2017
• Est. Priority Date: 01/21/2016
• Status: Active Grant

• Current Assignee: Panasonic Intellectual Property Management Co., Ltd. (Panasonic Holdings Corporation)
• Original Assignee: Panasonic Intellectual Property Management Co., Ltd. (Panasonic Holdings Corporation)
• Inventors: KANEHARA, HIDENARI, MIYAKE, YASUO, MURAKAMI, MASASHI, NISHIMURA, KAZUKO, YAMADA, TAKAYOSHI
• Granted Patent: US 9,894,297 B2
• Time in Patent Office: Days
• CPC Class Codes: H04N 25/585 with pixels having different sensitivities within the sensor, e.g. fast or slow pixels or pixels having different sizes
• CPC Class Codes: H04N 25/59 by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance
• CPC Class Codes: H04N 25/702 SSIS architectures characterised by non-identical, non-equidistant or non-planar pixel layout
• CPC Class Codes: H04N 25/74 Circuitry for scanning or addressing the pixel array
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors
• CPC Class Codes: H04N 25/771 comprising storage means other than floating diffusion

Abstract

An imaging device includes a pixel cell including: a first photoelectric converter that generates a first electrical signal; and a first signal detection circuit that detects the first electrical signal. The first signal detection circuit includes: a first transistor one of a source and a drain of which is electrically connected to the first photoelectric converter; a first capacitor having first and second ends, the first end being electrically connected to the other of the source and the drain of the first transistor, a reference voltage being applied to the second end; and a second transistor having a gate electrically connected to the first photoelectric converter. The pixel cell outputs, in one frame period, a first image signal and a second image signal in sequence, the first image signal being output when the first transistor is off, the second image signal being output when the first transistor is on.

Claims

1. An imaging device comprising a first pixel cell including:

a first photoelectric converter that generates a first electrical signal; and

a first signal detection circuit that detects the first electrical signal, wherein

the first signal detection circuit includes;

a first transistor having a source and a drain, one of the source and the drain being electrically connected to the first photoelectric converter;

a first capacitor having a first end and a second end, the first end being electrically connected to the other of the source and the drain of the first transistor, a reference voltage being applied to the second end; and

a second transistor having a gate electrically connected to the first photoelectric converter, and

the first pixel cell outputs, in one frame period, a first image signal and a second image signal in sequence, the first image signal being output when the first transistor is off, the second image signal being output when the first transistor is on.

3. The imaging device according to claim 1, further comprising a second pixel cell including:

a second photoelectric converter that generates a second electrical signal; and

a second signal detection circuit that detects the second electrical signal, wherein

the second signal detection circuit includes;

a second capacitor having a first end and a second end, the first end being electrically connected to the second photoelectric converter, a reference voltage being applied to the second end; and

a third transistor having a gate electrically connected to the second photoelectric converter.

4. The imaging device according to claim 1, wherein

the first signal detection circuit further includes a second capacitor having a first end and a second end, the first end being electrically connected to the first photoelectric converter, the second end being electrically connected to the other of the source and the drain of the first transistor, and

the second capacitor is smaller in capacitance than the first capacitor.

5. The imaging device according to claim 1, further comprising a first feedback circuit that forms a feedback path through which a second electrical signal generated in the first photoelectric converter is negatively fed back.

6. The imaging device according to claim 5, wherein the first feedback circuit negatively feeds back the second electrical signal to the other of the source and the drain of the first transistor.

7. The imaging device according to claim 5, further comprising

a second pixel cell including:

a second photoelectric converter that generates a third electrical signal; and

a second signal detection circuit that detects the third electrical signal, the second signal detection circuit including;

a second capacitor having a first end and a second end, the first end being electrically connected to the second photoelectric converter, a reference voltage being applied to the second end; and

a third transistor having a gate connected to the second photoelectric converter, and

a second feedback circuit that forms a feedback path through which a fourth electrical signal generated in the second photoelectric converter is negatively fed back.

8. The imaging device according to claim 7, wherein the second signal detection circuit includes no transistor between the second photoelectric converter and the first end of the second capacitor.

2. An imaging device comprising first pixel cells each including:

a first photoelectric converter that generates a first electrical signal; and

a first signal detection circuit that detects the first electrical signal, wherein

the first signal detection circuit includes;

a first transistor having a source and a drain, one of the source and the drain being electrically connected to the first photoelectric converter;

a first capacitor having a first end and a second end, the first end being electrically connected to the other of the source and the drain of the first transistor, a reference voltage being applied to the second end; and

a second transistor having a gate electrically connected to the first photoelectric converter, and

one of the first pixel cells outputs a first image signal and other one of the first pixel cells outputs a second image signal at a same timing in one frame period, the first image signal being output when the first transistor is off, the second image signal being output when the first transistor is on.

9. An imaging device comprising a first pixel cell including:

a first photoelectric converter that generates a first electrical signal; and

a first signal detection circuit that detects the first electrical signal, wherein

the first signal detection circuit includes;

a first transistor having a source and a drain, one of the source and the drain being electrically connected to the first photoelectric converter;

a first capacitor having a first end and a second end, the first end being electrically connected to the other of the source and drain of the first transistor, a reference voltage being applied to the second end; and

a second transistor having a gate electrically connected to the first photoelectric converter, and

the first pixel cell selectively outputs, in one frame period, either a first image signal or a second image signal according to a magnitude of the first electrical signal, the first image signal being output when the first transistor is off, the second image signal being output when the first transistor is on.

10. The imaging device according to claim 9, further comprising a sensitivity switching circuit electrically connected to the first photoelectric converter, wherein

the first signal detection circuit further includes a third transistor having a gate connected to the sensitivity switching circuit, the third transistor being connected, in series, to the first transistor, and

the sensitivity switching circuit turns on or off the third transistor according to a magnitude of a signal output from the first pixel cell when the first transistor is off.

11. The imaging device according to claim 10, wherein the sensitivity switching circuit includes a comparator that compares a magnitude of the signal output from the first pixel cell when the first transistor is off with a magnitude of a reference signal.