METHOD FOR CONFIGURING AN OPTICAL MODULATOR

• US 20170227829A1
• Filed: 04/25/2017
• Published: 08/10/2017
• Est. Priority Date: 04/15/2015
• Status: Abandoned Application

• Current Assignee: Chen-Kuo Sun
• Original Assignee: Chen-Kuo Sun
• Inventors: Sun, Chen-Kuo, Chen, Dingbo
• Application Number:
  US15/496,425
• Publication Number:
  US 20170227829A1
• Time in Patent Office: Days
• CPC Class Codes: G02B 2006/12061 Silicon
• CPC Class Codes: G02B 6/12004 Combinations of two or more optical elements
• CPC Class Codes: G02B 6/136 by etching
• CPC Class Codes: G02B 6/138 by using polymerisation
• CPC Class Codes: G02F 1/065 in an optical waveguide structure
• CPC Class Codes: G02F 1/3133 the optical waveguides being made of semiconducting materials
• CPC Class Codes: G02F 1/3135 Vertical structure

Abstract

A method for manufacturing an electro-optically coupled switch in accordance with the present invention requires a sequential reconfiguration of a layer of semiconductor material. To begin, a base member is created wherein the semiconductor layer is positioned on a layer of insulator material with the insulator material positioned between the semiconductor layer and a semiconductor substrate. In sequence, with a first etch, the semiconductor layer is etched to create waveguides on opposite sides of a slot. In a second etch, the slot is deepened to expose the layer of insulator material in the slot. With a third contact pad doping process, pads can be positioned on top of the layer of insulator material for electrical contact with the respective waveguides. Metal contacts can then be placed on the contact pads, the slot can be filled with an electro-optical polymer and, if needed, the polymer can be poled.

Claims

1. A method for manufacturing an electro-optically coupled switch comprising the steps of:

providing a layer of a conducting semiconductor material, wherein the layer is shaped as a rectangular prism and is mounted on an insulating substrate having a top silica layer, wherein the layer of semiconductor material is bounded by a pair of opposed parallel edges between a top and a bottom;

removing material from the layer of semiconductor material through a same distance x_e from each edge of the layer and through a same distance d₁ from the top of the layer, to establish edge segments through the distance x_e from the respective edge of the layer and at the distance d₁ from the top thereof;

creating a slot in the layer of semiconductor material along a central plane located equidistant from each edge of the layer, wherein the center of the slot is aligned with the central plane and the slot has a width x_c, and the slot extends through the layer from top to bottom, to establish opposed waveguide-electrodes between the slot and the edge segments of the layer, wherein the two opposed waveguide-electrodes each has an optical input port and an optical output port;

filling the slot with a non-conducting and electro-optic sensitive polymer to function as a cross-coupling material;

doping the edge segments of the semiconductor material through a distance x_d from each edge of the layer to establish contact pads with a respective waveguide-electrode; and

interconnecting a respective metal electrode with each contact pad to selectively provide a switching voltage V_π

from a voltage source for the electro-optically coupled switch.

2. The method recited in claim 1 further comprising the step of poling the polymer in the slot to optimize an electro-optic coefficient for the cross-coupling material to accommodate an optical signal passing through the electro-optically coupled switch.

3. The method recited in claim 2 wherein the poling step optimizes an orientation of the electro-optic coefficient with a TE mode of the optical signal.

4. A method for manufacturing an electro-optically coupled switch comprising the steps of:

creating a base member having a length L, a width W_s, and a thickness T, wherein the base member defines a central plane located equidistant between opposed edges of the base member, and wherein the base member includes a layer of a non-conducting semiconductor substrate and a layer of a doped semiconductor conducting material, with a layer of an insulator material positioned therebetween;

performing a first etch using a self-aligned first mask by removing material from the layer of semiconductor material on the base member to a depth d₁, along the length L through a distance x_e extending from each edge of the base member toward the central plane and a slot region along the length L through a distance x_c symmetrically centered on the central plane;

performing a second etch, using the self-aligned first mask and a second mask to remove material from the layer of semiconductor material on the base member to a depth d₂ in the slot region which is along the length L and through the distance x_c to expose the insulator material in the slot region between opposed waveguide-electrodes, wherein each waveguide-electrode has an optical input port and an optical output port, and each waveguide-electrode has a width of at least x_w and a length L, and wherein d₂>

d₁, and W_s=2x_e+2x_w+x_c;

filling the slot with a non-conducting and electro-optic sensitive polymer to function as a cross-coupling material;

doping the semiconductor material through a distance x_d from each edge of the base member to establish respective contact pads along each edge of the base member, for connection of each contact pad with a respective waveguide-electrode, wherein x_d is less than x_e (x_d<

x_e); and

interconnecting a respective metal electrode with each contact pad to selectively provide a switching voltage V_π

from a voltage source for the electro-optically coupled switch.

5. The method recited in claim 4 further comprising the step of poling the polymer in the slot to optimize an electro-optic coefficient for the cross-coupling material to accommodate an optical signal passing through the electro-optically coupled switch.

6. The method recited in claim 5 wherein the poling step optimizes an orientation of the electro-optic coefficient with a TE mode of the optical signal.

7. The method recited in claim 4 further comprising the step of passivating the layer of semiconductor material and the electro-optic sensitive polymer material.

8. The method recited in claim 4 wherein the semiconductor material is selected from the group consisting of silicon, compound semiconductor InP, GaAs, GaN, and quantum well semiconductors.

9. The method recited in claim 4 wherein the doping step further comprises the steps of:

performing a second doping process into the layer of semiconductor material through the distance x_d to the depth d₂ along the length L at each edge of the base member in its respective edge segment to create respective contact pads for connection with a metal electrode; and

N⁺ doping the contact pads to reduce switch series resistance.

10. The method recited in claim 4 further comprising the steps of:

providing the self-aligned first mask for the first etch, wherein the first mask is formed with a central cutout and a pair of rectangular shaped side cutouts positioned on opposite sides of the central cutout from each other to define a pair of parallel strips, with each strip having the length L and a width x_w with the distance x_c therebetween;

aligning the self-aligned first mask to cover the base member with the parallel strips symmetrically positioned to straddle the central plane;

providing a second mask for the second etch, wherein the second mask is formed with a single rectangular shaped cut-out having a length L and a width equal to W_c wherein x_c<

W_c<

x_c+2x_w;

aligning the second mask to cover the first mask pattern which is imposed on the base member with the rectangular shaped cut-out symmetrically positioned relative to the central plane;

providing a third mask for the heavily doped region to reduce switch series resistance wherein the third mask is a panel having a length L and a width equal to W_s-2x_d; and

aligning the third mask symmetrically on the base member to dope the edge segments of the base member.

11. The method recited in claim 10 wherein the self-aligned first mask, the second mask, and the third mask are made using a photo-lithography process.

12. The method recited in claim 4 wherein the first etch and the second etch are accomplished using a chemical/physical process.

13. A method for manufacturing an electro-optically coupled switch comprising the steps of:

providing a base member having a non-conducting semiconductor substrate and a layer of a conducting semiconductor material, with a layer of insulator material positioned therebetween;

positioning a first mask against the layer of semiconductor material;

etching the layer of semiconductor material behind the first mask to remove the layer of semiconductor material to a depth d₁, and to form a slot straddled by opposed waveguide-electrodes;

positioning a second mask against the opposed waveguide-electrodes;

etching the layer of semiconductor material in the slot to a depth d₂ to expose insulator material in the slot between the opposed waveguide-electrodes, and d₂ is greater than d₁ (d₂>

d₁), and wherein each waveguide-electrode has an optical input port and an optical output port;

positioning a third mask over the slot and over the opposed waveguide-electrodes to expose an edge segment for each waveguide-electrode, wherein each edge segment is at a respectively same distance from the slot;

doping the exposed segments of each waveguide-electrode in the layer of semiconductor material to the depth d₂ and to the edge segments beyond the waveguide-electrode from the slot to create respective contact pads;

connecting an electrode with each contact pad;

filing the slot with a non-conducting polymer material; and

poling the polymer material in the slot.

14. The method recited in claim 13 wherein the layer of semiconductor material is selected from the group consisting of silicon, compound semiconductor such as InP, GaAs, GaN, and quantum well compound semiconductor materials.

15. The method recited in claim 13 wherein the layer of semiconductor material is a doped N material and the contact pads are heavily N⁺ doped material to reduce the switch series resistance.

16. The method recited in claim 13 wherein the insulator material is silica.

17. The method recited in claim 13 wherein the polymer material used in the poling step is an electro-optic cross-coupling polymer, and the poling step is accomplished to optimize an alignment of the electro-optic coefficient of the polymer material.

18. The method recited in claim 13 wherein the base member is rectangular shaped having a length L, a width W_s, and wherein the base member defines a central plane located equidistant between opposed edges of the base member, the method further comprising the steps of:

forming the first mask, wherein the first mask is formed with a central cutout and a pair of rectangular shaped side cutouts, wherein the side cutouts are on opposite sides of the central cutout from each other to define a pair of parallel strips, with each strip having the length L and a width x_w with the distance x_c therebetween; and

aligning the first mask to cover the base member with the parallel strips symmetrically positioned relative to the central plane.

19. The method recited in claim 18 further comprising the steps of:

forming the second mask for a second etch, wherein the second mask is formed with a single rectangular shaped central cutout having a length L and a width equal to W_c, wherein x_c<

W_c<

x_c+2x_w; and

aligning the second mask to cover the first mask pattern imposed on the base member with the rectangular shaped cut-out symmetrically positioned relative to the central plane.

20. The method recited in claim 19 further comprising the steps of:

forming the third mask for heavy doping into the contact pads wherein the third mask is a panel having a length L and a width equal to W_s-2x_d; and

aligning the third mask symmetrically on the base member to expose edge segments of the base member.