Analog Predistorter Core Module and Analog Predistorter System

• US 20170237455A1
• Filed: 05/03/2017
• Published: 08/17/2017
• Est. Priority Date: 11/14/2014
• Status: Active Grant

• Current Assignee: Huawei Technologies Co., Ltd. (Huawei Investment & Holding Co., Ltd.)
• Original Assignee: Huawei Technologies Co., Ltd. (Huawei Investment & Holding Co., Ltd.)
• Inventors: Ye, Siqing, Wang, Jinming, Wang, Chen, You, Lan, Zhu, Erni
• Granted Patent: US 9,893,748 B2
• Time in Patent Office: Days
• CPC Class Codes: H03F 1/3247 using feedback acting on predistortion circuits H03F1/3264 takes precedence
• CPC Class Codes: H03F 2200/102 A non-specified detector of a signal envelope being used in an amplifying circuit
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2201/3233 Adaptive predistortion using lookup table, e.g. memory, RAM, ROM, LUT, to generate the predistortion
• CPC Class Codes: H03F 3/19 with semiconductor devices only
• CPC Class Codes: H03F 3/21 with semiconductor devices only H03F3/245 takes precedence
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H04B 1/0475 with means for limiting noise, interference or distortion H04B1/0483 takes precedence
• CPC Class Codes: H04B 2001/0408 with power amplifiers
• CPC Class Codes: H04L 25/49 using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems spectral shaping H04L25/03828

Abstract

An analog predistorter (APD) core module including a radio frequency delay module, an envelope module, and a contact matrix module. The radio frequency delay module is configured to receive a feed-forward radio frequency signal, generate multiple radio frequency delay signals with different delays according to the feed-forward radio frequency signal, and output each radio frequency delay signal to the contact matrix module. The envelope module is configured to receive the feed-forward radio frequency signal, perform envelope detection on the feed-forward radio frequency signal to obtain multiple envelope signals with different delays, and output each envelope signal to the contact matrix module. The contact matrix module is configured to receive each radio frequency delay signal, each envelope signal, and a predistortion coefficient from an exterior source, and generate a predistortion signal according to the predistortion coefficient, each radio frequency delay signal, and each envelope signal.

Claims

1. An analog predistorter (APD) core module, wherein the APD core module comprises:

a radio frequency delay module;

an envelope module; and

a contact matrix module, wherein the contact matrix module is connected to both the radio frequency delay module and the envelope module;

wherein the radio frequency delay module is configured to receive a feed-forward radio frequency signal, generate multiple radio frequency delay signals with different delays according to the feed-forward radio frequency signal, and output each radio frequency delay signal to the contact matrix module;

wherein the envelope module is configured to receive the feed-forward radio frequency signal, perform envelope detection on the feed-forward radio frequency signal to obtain multiple envelope signals with different delays, and output each envelope signal to the contact matrix module; and

wherein the contact matrix module is configured to receive each radio frequency delay signal, each envelope signal, and a predistortion coefficient from an exterior source, and generate a predistortion signal according to the predistortion coefficient, each radio frequency delay signal, and each envelope signal.

2. The APD core module according to claim 1, wherein the radio frequency delay module comprises multiple radio frequency delay units (RFDs), and the multiple RFDs are respectively an RFD₀, an RFD₁, . . . , and an RFD_N−

1, wherein N is a quantity of columns of a preset nonlinear model matrix;

wherein the RFD₀, the RFD₁, . . . , and the RFD<sub>N−

1</sub> are sequentially connected in series, and an output end of each RFD in the RFD₀, the RFD₁, . . . , and the RFD<sub>N−

1</sub> is connected to the contact matrix module;

wherein the RFD₀ is configured to receive a feed-forward radio frequency signal x(t), delay the feed-forward radio frequency signal x(t) to obtain a first radio frequency delay signal x(t−

τ

_RF1), and output the first radio frequency delay signal x(t−

τ

_RF1) to the contact matrix module; and

wherein the RFD_n is configured to receive an n^th radio frequency delay signal x(t−

τ

_RFn) output by the RFD<sub>n−

1</sub>, delay the n^th radio frequency delay signal x(t−

τ

_RFn) to obtain an (n+1)^th radio frequency delay signal x(t−

τ

_RFn+1), and output the (n+1)^th radio frequency delay signal x(t−

τ

_RFn+1) to the contact matrix module, wherein n=1, 2, . . . , N−

1.

3. The APD core module according to claim 1, wherein the envelope module comprises an envelope detector unit (ED) and multiple baseband delay units (BBDs), wherein the multiple BBDs are respectively a BBD₁, a BBD₂, . . . , and a BBD_M−

1, and wherein M is a quantity of rows of a preset nonlinear model matrix;

wherein an output end of the ED is connected to an input end of the BBD₁, the BBD₁, the BBD₂, . . . , and the BBD<sub>M−

1</sub> are sequentially connected in series, and an output end of each BBD in the BBD₁, the BBD₂, . . . , and the BBD<sub>M−

1</sub> is connected to the contact matrix module;

wherein the ED is configured to receive the feed-forward radio frequency signal x(t), perform envelope detection on the feed-forward radio frequency signal x(t) to obtain a first envelope signal r(t−

τ

_BB1), and output the first envelope signal r(t−

τ

_BB1) to the BBD₁ and the contact matrix module;

wherein the BBD₁ is configured to delay the first envelope signal r(t−

τ

_BB1) to obtain a second envelope signal r(t−

τ

_BB2), and output the second envelope signal r(t−

τ

_BB2) to the BBD₂ and the contact matrix module;

wherein the BBD_m is configured to receive an m^th envelope signal r(t−

τ

_BBm) output by the BBD<sub>m−

1</sub>, delay the m^th envelope signal r(t−

τ

_BBm) to obtain an (m+1)^th envelope signal r(t−

τ

_BBm+1), and output the (m+1)^th envelope signal r(t−

τ

_BBm+1) to a BBD_m+1 and the contact matrix module, wherein m=2, 3, . . . , M−

2; and

wherein the BBD<sub>M−

1</sub> is configured to receive an (M−

1)^th envelope signal r(t−

τ

<sub>BBM−

1</sub>) output by the BBD<sub>M−

2</sub>, delay the (M−

1)^th envelope signal r(t−

τ

<sub>BBM−

1</sub>) to obtain an M^th envelope signal r(t−

τ

_BBM), and output the M^th envelope signal r(t−

τ

_BBM) to the contact matrix module.

4. The APD core module according to claim 1, wherein the envelope module comprises multiple envelope generation units EDs, and the multiple envelope generation units EDs are respectively an ED₀, an ED₁, . . . , and an ED_N−

1, wherein N is a quantity of columns of a preset nonlinear model matrix;

wherein an input end of the ED₀ is configured to receive the feed-forward radio frequency signal, and an output end of the ED₀ is connected to the contact matrix module;

wherein an input end of the ED_n is connected to an output end of the radio frequency delay module, and an output end is connected to the contact matrix module, wherein n=1, 2, . . . , N−

1; and

wherein the ED_n is configured to receive an (n+1)^th radio frequency delay signal x(t−

τ

_RFn+1), perform envelope detection on the (n+1)^th radio frequency delay signal x(t−

τ

_RFn+1) to obtain an (n+1)^th envelope signal r(t−

τ

_BBn+1), and output the (n+1)^th envelope signal r(t−

τ

_BBn+1) to the contact matrix module, wherein n=0, 1, . . . , N−

1.

6. The APD core module according to claim 1, wherein the contact matrix module comprises:

multiple block signal lookup tables BSLs; and

a predistortion signal adder;

wherein the multiple BSLs are respectively a BSL₁, a BSL₂, . . . , and a BSL_N, wherein N is a preset integer;

wherein the BSL_n is connected to the radio frequency delay module, the envelope module, the predistortion signal adder, and an APD training module, wherein n=1, 2, . . . , N;

wherein the BSL_n receives an n^th radio frequency delay signal x(t−

τ

_RFn) output by the radio frequency delay module, M envelope signals output by the envelope module, and a predistortion coefficient output by the APD training module, selects at least one envelope signal from the M envelope signals, performs amplitude conversion and phase conversion on the n^th radio frequency delay signal x(t−

τ

_RFn) according to the selected at least one envelope signal and the received predistortion coefficient to obtain an n^th tap signal, and outputs the n^th tap signal to the predistortion signal adder; and

wherein the predistortion signal adder is configured to receive tap signals output by all BSLs, wherein the tap signals are respectively a first tap signal, a second tap signal, . . . , and an N^th tap signal; and

add the first tap signal, the second tap signal, . . . , and the N^th tap signal to obtain the predistortion signal.

7. The APD core module according to claim 6, wherein the BSL_n comprises:

an in-phase block lookup table (BLUT);

a quadrature BLUT; and

an analog vector modulator (AVM);

wherein an envelope input end of the in-phase BLUT and an envelope input end of the quadrature BLUT are connected to the envelope module;

a coefficient input end of the in-phase BLUT and a coefficient input end of the quadrature BLUT are connected to coefficient input ends of the BSL module;

wherein a coefficient at the coefficient input end of the in-phase BLUT is an in-phase BLUT coefficient;

a coefficient at the coefficient input end of the quadrature BLUT is a quadrature BLUT coefficient, and a coefficient at a coefficient input end of the BSL module is a BSL coefficient;

wherein the BSL coefficient comprises two coefficients, including the in-phase BLUT coefficient and the quadrature BLUT coefficient;

wherein an output end of the in-phase BLUT and an output end of the quadrature BLUT are respectively connected to an in-phase modulation signal input end of the AVM and a quadrature modulation signal input end of the AVM;

wherein a first input end of the AVM is connected to the radio frequency delay module; and

an output end of the AVM is connected to the predistortion signal adder;

wherein the envelope input end of the in-phase BLUT and the envelope input end of the quadrature BLUT comprise at least one delayed envelope signal, and the comprised envelope signal is determined by a nonlinear model matrix A, and nonlinear predistortion coefficients of the in-phase BLUT coefficient and the quadrature BLUT coefficient are determined by the nonlinear model matrix A;

wherein a linear model vector L determines whether the in-phase BLUT coefficient and the quadrature BLUT coefficient comprise a linear predistortion coefficient;

wherein the in-phase BLUT receives a linear predistortion coefficient h_n,i and nonlinear predistortion coefficients c_m,n,1,i˜

c_m,n,K,i that are input by the APD training module, the in-phase BLUT selects at least one envelope signal, the in-phase BLUT obtains an in-phase BLUT output signal w_n,i(t) according to the linear predistortion coefficient h_n,i, the nonlinear predistortion coefficients c_m,n,1,i˜

c_m,n,K,i, and the selected at least one envelope signal, and the in-phase BLUT outputs the in-phase BLUT output signal w_n,i(t) to the in-phase modulation signal input end of the AVM;

wherein, in the BSL_n, i in a subscript of the coefficient indicates that a radio frequency signal served by the coefficient is the n^th radio frequency delay signal x(t−

τ

_RFn), and q in a subscript of the coefficient indicates that a radio frequency signal served by the coefficient is Hilbert transform of the n^th radio frequency delay signal, that is, {circumflex over (x)}(t−

τ

_RFn);

wherein, in the BSL_n, m in a subscript of the coefficient indicates that an envelope signal served by the coefficient is an m^th envelope delay signal r(t−

τ

_BBm);

wherein the quadrature BLUT receives a linear predistortion coefficient h_n,q and nonlinear predistortion coefficients c_m,n,1,q˜

c_m,n,K,q that are input by the APD training module, selects at least one envelope signal, the quadrature BLUT obtains a quadrature BLUT output signal w_n,q(t) according to the linear predistortion coefficient h_n,q, the nonlinear predistortion coefficients c_m,n,1,q˜

c_m,n,K,q, and the selected at least one envelope signal, and the quadrature BLUT outputs the quadrature BLUT output signal w_n,q(t) to the quadrature modulation signal input end of the AVM; and

wherein the AVM receives the in-phase BLUT output signal w_n,i(t), the quadrature BLUT output signal w_n,q(t), and the radio frequency delay signal x(t−

τ

_RFn) output by the radio frequency delay module, and processes the radio frequency delay signal x(t−

τ

_RFn) according to the in-phase BLUT output signal w_n,i(t) and the quadrature BLUT output signal w_n,q(t), to obtain an output radio frequency signal v_n(t) that is the n^th tap signal, wherein n=1, 2, . . . , N.

8. The APD core module according to claim 7, wherein the AVM of the BSL_n comprises:

a quadrature phase splitter (QPS);

an in-phase multiplier;

a quadrature multiplier; and

a subtractor;

wherein an input end of the QPS is connected to an output end of the radio frequency delay module, a first output end is connected to a first input end of the in-phase multiplier, and a second output end is connected to a first input end of the quadrature multiplier;

wherein the QPS is configured to receive the n^th radio frequency delay signal x(t−

τ

_RFn) sent by the radio frequency delay module, wherein the QPS is configured to divide the n^th radio frequency delay signal x(t−

τ

_RFn) into a radio frequency delay signal x(t−

τ

_RFn) on a 0-degree and a radio frequency delay signal {circumflex over (x)}(t−

τ

_RFn) on a −

90-degree, wherein a phase difference between the two radio frequency delay signals is 90 degrees;

wherein the QPS is configured to output the radio frequency delay signal x(t−

τ

_RFn) on the 0-degree to the in-phase multiplier; and

wherein the QPS is configured to output the radio frequency delay signal {circumflex over (x)}(t−

τ

_RFn) on the −

90-degree to the quadrature multiplier;

wherein the in-phase multiplier is configured to receive the in-phase BLUT output signal and the radio frequency delay signal x(t−

τ

_RFn) on the 0-degree, wherein the in-phase multiplier is configured to multiply the in-phase BLUT output signal by the radio frequency delay signal x(t−

τ

_RFn) on the 0-degree to obtain an in-phase modulated radio frequency signal, and wherein the in-phase multiplier is configured to output the in-phase modulated radio frequency signal to the subtractor;

wherein the quadrature multiplier is configured to receive the quadrature BLUT output signal and the radio frequency delay signal {circumflex over (x)}(t−

τ

_RFn) on the −

90-degree, wherein the quadrature multiplier is configured to multiply the quadrature BLUT output signal by the radio frequency delay signal {circumflex over (x)}(t−

τ

_RFn) on the −

90-degree to obtain a quadrature modulated radio frequency signal, and wherein the quadrature multiplier is configured to output the quadrature modulated radio frequency signal to the subtractor; and

wherein the subtractor is configured to subtract the quadrature modulated radio frequency signal from the in-phase modulated radio frequency signal to obtain the n^th tap signal.

9. The APD core module according to claim 7, wherein the BLUT of the BSL_n comprises:

at least one lookup table (LUT); and

a BLUT adder;

wherein the at least one LUT comprises a LUT_m,n, wherein m=1, 2, . . . , M, and M is a preset integer;

wherein the nonlinear model matrix A is preset, wherein A has M rows and N columns, an element on an m^th row and an n^th column of A is A_m,n, and wherein a value of A_m,n is 0 or 1;

wherein A_m,n=1 indicates that the BLUT comprises the LUT_m,n and a BLUT coefficient input to the BLUT comprises the nonlinear predistortion coefficients c_m,n,1,i to c_m,n,K,i, and wherein A_m,n=0 indicates that the BLUT does not comprise the LUT_m,n and a BLUT coefficient input to the BLUT does not comprise the nonlinear predistortion coefficients c_m,n,1,i to c_m,n,K,i, wherein m=1, 2, . . . , M, and M is a preset integer;

wherein the linear model vector L is preset, wherein L has N elements, an n^th element of L is L_n, and a value of L_n is 0 or 1;

when L_n=1, the BLUT coefficient comprises linear predistortion coefficients h_n,i and h_n,q, or when L_n=0, the BLUT coefficient does not comprise linear predistortion coefficients h_n,i and h_n,q, wherein n=1, 2, . . . , N;

a first input end of the LUT_m,n is connected to the envelope module, a second input end is connected to the APD training module, and an output end is connected to the BLUT adder, and the BLUT adder is further connected to the APD training module;

wherein the LUT_m,n receives the m^th envelope signal r(t−

τ

_BBm) output by the envelope module and a nonlinear predistortion coefficient output by the APD training module, wherein the LUT_m,n obtains, according to the predistortion coefficient, a LUT signal corresponding to the m^th envelope signal r(t−

τ

_BBm), and wherein the LUT_m,n outputs the LUT signal to the BLUT adder, wherein m=1,2, . . . , M; and

wherein the BLUT adder receives a LUT signal output by each LUT and the linear predistortion coefficient output by the APD training module, and wherein the BLUT adder adds each LUT signal and the linear predistortion coefficient to obtain an in-phase modulation signal and a quadrature modulation signal.

10. The APD core module according to claim 9, wherein the LUT comprises:

an LUT adder;

multiple basis function generation units (BFGs); and

multiple multipliers, wherein each BFG of the multiple BFGs corresponds to a multiplier of the multiple multipliers;

wherein an input end of each BFG is connected to the envelope module, and an output end is respectively connected to a first input end of a multiplier corresponding to each BFG; and

a second input end of each multiplier in the multiple multipliers is connected to the APD training module, and an output end is connected to the LUT adder;

wherein the BFG is configured to receive the envelope signal r(t−

τ

_BBm) output by the envelope module, wherein the BFG is configured to generate a basis function signal according to the envelope signal r(t−

τ

_BBm), and wherein the BFG is configured to output the basis function signal to a multiplier corresponding to the BFG, wherein m=1,2, . . . , M;

wherein the multiplier is configured to receive the basis function signal and a first predistortion coefficient output by the APD training module, wherein the multiplier is configured to obtain a basis contribution signal according to the basis signal and the first predistortion coefficient, and wherein the multiplier is configured to output the basis contribution signal to the BLUT adder; and

wherein the LUT adder is configured to receive a basis contribution signal output by each multiplier, and wherein the LUT adder is configured to add the received basis contribution signals, to obtain the LUT signal.

11. The APD core module according to claim 9, wherein the LUT comprises:

an LUT adder;

a reference voltage generation module;

multiple basis function generation units (BFGs); and

multiple multipliers, wherein each BFG of the multiple BFGs corresponds to a multiplier of the multiple multipliers;

wherein a first input end of each BFG is connected to the envelope module, a second input end is connected to the reference voltage generation module, and an output end of each BFG is connected to a first input end of a multiplier corresponding to each BFG;

wherein a second input end of each multiplier in the multiple multipliers is connected to the APD training module, and an output end is connected to the LUT adder;

wherein the BFG is configured to receive the envelope signal r(t−

τ

_BBm) output by the envelope module and a reference voltage input by the reference voltage generation module, wherein the BFG is configured to generate a basis function signal according to the envelope signal r(t−

τ

_BBm) and the reference voltage, and wherein the BFG is configured to output the basis function signal to a multiplier corresponding to the BFG, wherein m=1,2, . . . , M;

wherein the multiplier is configured to receive the basis function signal and a first predistortion coefficient output by the APD training module, wherein the multiplier is obtain a basis contribution signal according to the basis function signal and the first predistortion coefficient, and wherein the multiplier is output the basis contribution signal to the LUT adder; and

wherein the LUT adder is configured to receive a basis contribution signal output by each multiplier, and wherein the LUT adder is add the received basis contribution signals, to obtain the LUT signal.

12. The APD core module according to claim 11, wherein the reference voltage generation module of the LUT comprises:

an amplifier;

a third resistor;

a fourth resistor; and

multiple fifth resistors, wherein the multiple fifth resistors are sequentially connected in series to form a series circuit;

wherein an output end of the amplifier is connected to an end of the third resistor, an end of the series circuit, and a BFG, wherein another end of the third resistor is connected to a negative electrode input end of the amplifier and an end of the fourth resistor, and wherein another end of the fourth resistor is connected to the ground; and

wherein a connection point of any two neighboring fifth resistors in the series circuit is connected to a BFG, and another end of the series circuit is connected to the ground.

13. The APD core module according to claim 11, wherein the LUT comprises K BFGs, and the K BFGs are respectively a BFG_1, a BFG_2, . . . , and a BFG_K, wherein K is a preset integer;

and

a gate electrode of a first MOS transistor of the BFG_k is connected to the envelope module of the APD core module, a gate electrode of a second MOS transistor is connected to the reference voltage generation module of the APD core module, and a V1 output end of the BFG_k outputs a single-ended downhill basis function signal, or a V2 output end of the BFG_k outputs a single-ended uphill basis function signal, wherein k=1, 2, . . . , K.

14. The APD core module according to claim 13, further comprising a first LS and multiple second LSs, wherein each BFG in the multiple BFGs is corresponding to a second LS;

wherein a first input end of the first LS is connected to the differential positive output end of the differential envelope module, and an output end is connected to the differential positive input end of each BFG in the multiple BFGs; and

wherein a first input end of each second LS in the multiple second LSs is connected to the differential negative output end of the envelope module, a second input end is connected to the reference voltage generation module, and an output end is connected to a differential negative input end of a BFG corresponding to the second LS.

15. The APD core module according to claim 13, wherein each BFG in the K BFGs comprises:

a first MOS field-effect transistor;

a second MOS transistor;

a third MOS transistor;

a first resistor; and

a second resistor;

wherein an end of the first resistor and an end of the second resistor are both connected to a power supply, wherein another end of the first resistor is connected to a drain electrode of the first MOS transistor, and wherein another end of the second resistor is connected to a drain electrode of the second MOS transistor; and

wherein a base electrode of the first MOS transistor is connected to the external envelope module, and a source electrode is connected to a drain electrode of the third MOS transistor, wherein a base electrode of the second MOS transistor is connected to the external reference voltage generation module, and a source electrode is connected to the drain electrode of the third MOS transistor, and wherein a source electrode of the third MOS transistor is connected to the ground.

16. The APD core module according to claim 11, wherein the LUT comprises:

K BFGs; and

K+1 level shifters (LSs),

wherein K is a preset integer, wherein the K BFGs are respectively a BFG_1, a BFG_2, . . . , and a BFG_K, and wherein the K+1 LSs are respectively an LS0, an LS1, . . . , and an LSK;

wherein a first input end of the LS0 is connected to a differential positive end of an output end of the differential envelope module, a second input end receives a constant-voltage signal Vref0 input from exterior, and an output end is connected to a differential positive input end of the BFG_K, to perform, according to the constant-voltage signal, translation on a differential positive-end envelope signal output by the differential envelope module, and output the translated differential positive-end envelope signal to the differential positive input end of an input end of the BFG_K, wherein k=1, 2, . . . , K;

wherein a first input end of the LSk is connected to a differential negative end of the output end of the envelope module, a second input end is connected to Vrefk output by the reference voltage generation module, and an output end is connected to a differential negative input end of an input end of the BFG_k, to receive a differential negative-end envelope signal and a reference voltage that is output by the reference voltage generation module, perform translation on the differential negative-end envelope signal according to the reference voltage, and output the translated differential negative-end envelope signal to the differential negative input end of the input end of the BFG_k, wherein k=1, 2, . . . , K; and

wherein a signal output by one of a V2 output end is subtracted from a signal output by a V1 output end of the BFG_k to form a differential downhill basis function signal, or a signal output, or a V1 output end is subtracted from a signal output by a V2 output end of the BFG_k to form a differential uphill function signal.

5. The APD core module according to claim i, wherein the envelope module comprises multiple envelope generation unit EDs and a BBD, and the multiple EDs are respectively an ED₀, an ED₁, . . . , and an ED_N, wherein N is a quantity of columns of a preset nonlinear model matrix;

wherein an input end of the ED₀ is configured to receive the feed-forward radio frequency signal, and an output end is connected to the contact matrix module;

wherein an input end of the ED_n is connected to an output end of the radio frequency delay module, and an output end is connected to the contact matrix module, wherein n=1, 2, . . . , N;

wherein an input end of the BBD is connected to an output end of the ED_N, and an output end is connected to the contact matrix module;

wherein the ED₀ is configured to receive the feed-forward radio frequency signal x(t), perform envelope detection on the feed-forward radio frequency delay signal x(t) to obtain a first envelope signal r(t−

τ

_BB1), and output the first envelope signal r(t−

τ

_BB1) to the contact matrix module;

wherein the ED_n is configured to receive an n^th radio frequency delay signal x(t−

τ

_RFn), perform envelope detection on the n^th radio frequency delay signal x(t−

τ

_RFn) to obtain an (n+1)^th envelope signal r(t−

τ

_BBn+1), and output the (n+1)^th envelope signal r(t−

τ

_BBn+1) to the contact matrix module, wherein n=1, 2, . . . , N−

1;

wherein the ED_N is configured to receive an N^th radio frequency delay signal x(t−

τ

_RFN), perform envelope detection on the N^th radio frequency delay signal x(t−

τ

_RFN) to obtain an (N+1)^th envelope signal r(t−

τ

_BBN+1), and output the (N+1)^th envelope signal r(t−

τ

_BBN+1) to the contact matrix module and the BBD; and

wherein the BBD is configured to receive the (N+1)^th envelope signal r(t−

τ

_BBN+1), and delay the (N+1)^th envelope signal r(t−

τ

_BBN+1) to obtain an (N+2)^th envelope signal r(t−

τ

_BBN+2), and output the (N+2)^th envelope signal r(t−

τ

_BBN+2) to the contact matrix module.