Nanoscale Field-Emission Device and Method of Fabrication

• US 20170250048A1
• Filed: 02/24/2017
• Published: 08/31/2017
• Est. Priority Date: 02/25/2016
• Status: Active Grant

• Current Assignee: California Institute of Technology
• Original Assignee: California Institute of Technology
• Inventors: SCHERER, Axel, JONES, William M., LUKIN, Danil M., WALAVALKAR, Sameer, CHANG, Chieh-feng
• Granted Patent: US 10,366,856 B2
• Time in Patent Office: Days
• CPC Class Codes: H01J 19/24 Cold cathodes, e.g. field-emissive cathode
• CPC Class Codes: H01J 21/02 Tubes with a single discharge path
• CPC Class Codes: H01J 21/105 with microengineered cathode and control electrodes, e.g. Spindt-type
• CPC Class Codes: H01J 2209/0223 Field emission cathodes
• CPC Class Codes: H01J 9/025 of field emission cathodes

Abstract

Nanoscale field-emission devices are presented, wherein the devices include at least a pair of electrodes separated by a gap through which field emission of electrons from one electrode to the other occurs. The gap is dimensioned such that only a low voltage is required to induce field emission. As a result, the emitted electrons energy that is below the ionization potential of the gas or gasses that reside within the gap. In some embodiments, the gap is small enough that the distance between the electrodes is shorter than the mean-free path of electrons in air at atmospheric pressure. As a result, the field-emission devices do not require a vacuum environment for operation.

Claims

1. An apparatus including a first field-emission device, the first field-emission device comprising:

a substrate;

a first electrode disposed on the substrate, the first electrode having a tip whose radius of curvature is at least 20 nm; and

a second electrode disposed on the substrate, the second electrode having a tip whose radius of curvature is at least 20 nm, wherein the first electrode and second electrode define a first gap having a first environment that is characterized by an ionization potential;

wherein the first gap has a first separation that enables field emission of electrons from one of the first electrode and second electrode with an electron energy that is less than the ionization potential.

2. The apparatus of claim 1 wherein the first gap is less than 200 nanometers.

3. The apparatus of claim 1 wherein the first gap is less than or equal to 100 nanometers.

4. The apparatus of claim 1 wherein the first electrode comprises a first material having a first work function and the second electrode comprises a second material having a second work function that is different than the first work function.

5. The apparatus of claim 1 further comprising a third electrode, wherein the first electrode, second electrode, and third electrode are dimensioned and arranged such that (1) a first voltage between the first electrode and second electrode gives rise to a field-emission current between the first electrode and second electrode and (2) the magnitude of the field-emission current is based on a second voltage between the third electrode and one of the first and second electrodes.

6. The apparatus of claim 5 further comprising a first element that includes a first layer stack comprising the first electrode, the third electrode, and a first insulator that is located between the first electrode and the third electrode.

7. The apparatus of claim 6 further comprising a second element that includes a second layer stack comprising the second electrode, a fourth electrode, and a second insulator that is located between the second electrode and the fourth electrode, wherein first electrode, second electrode, third electrode, and fourth electrode are dimensioned and arranged such that the magnitude of the field-emission current is further based on a third voltage between the fourth electrode and one of the first and second electrodes.

8. The apparatus of claim 6 wherein each of the first and second electrodes comprises a semiconductor having a first free-carrier concentration when the magnitude of the second voltage is substantially zero, and wherein the semiconductor has a second free-carrier concentration that is lower than the first free-carrier concentration when the second voltage has a non-zero magnitude.

9. The apparatus of claim 1 wherein the apparatus includes a circuit that includes the first field-emission device and a second field-emission device that comprises:

a third electrode disposed on the substrate; and

a fourth electrode disposed on the substrate, wherein the third electrode and fourth electrode define a second gap having the first environment;

wherein the second gap has a second separation that enables field emission of electrons from one of the third electrode and fourth electrode with an electron energy that is less than the ionization potential.

10. The apparatus of claim 9 further comprising at least one plasmonic interconnect that operatively couples the first field-emission device and the second field-emission device.

11. An apparatus including a first field-emission device, the first field-emission device comprising:

a substrate;

a first electrode disposed on the substrate, the first electrode having a first tip having a first radius of curvature that is at least 20 nm; and

a second electrode disposed on the substrate, the second electrode having a second tip having a second radius of curvature that is at least 20 nm, wherein the first electrode and second electrode are co-planar and define a first gap having a first environment that is characterized by an ionization potential;

wherein, when a first voltage is applied between them, the first and second electrodes generate a first in-plane, field-emission current of electrons having energy that is less than the ionization potential.

12. The apparatus of claim 11 wherein the first gap is less than 200 nanometers.

13. The apparatus of claim 11 wherein the first gap is less than or equal to 100 nanometers.

14. The apparatus of claim 11 wherein each of the first electrode and second electrode comprises a metal.

15. The apparatus of claim 11 wherein each of the first electrode and second electrode comprises a doped semiconductor.

16. The apparatus of claim 11 wherein the first electrode comprises a first material having a first work function and the second electrode comprises a second material having a second work function that is different than the first work function.

17. The apparatus of claim 11 further comprising a third electrode, wherein the first electrode, second electrode, and third electrode are dimensioned and arranged such that the magnitude of the first in-plane, field-emission current is based on a second voltage between the third electrode and one of the first and second electrodes.

18. The apparatus of claim 11 further comprising a first element and a second element, wherein the first element includes a first layer stack comprising the first electrode, the third electrode, and a first insulator that is located between the first electrode and the third electrode, and wherein the second element includes a second layer stack comprising the second electrode, a fourth electrode, and a second insulator that is located between the second electrode and the fourth electrode.

19. A method comprising:

providing a first electrode on a substrate, the first electrode comprising a first material that is electrically conductive, wherein the first electrode has a first shape that is lithographically defined; and

providing a second electrode on the substrate, the second electrode comprising a second material that is electrically conductive, wherein the second electrode has a second shape that is lithographically defined;

wherein the first electrode and second electrode collectively define a first gap having an environment that is characterized by an ionization potential; and

wherein the first and second electrodes are dimensioned and arranged such that they enable field emission of electrons from one of the first electrode and second electrode with an electron energy that is less than the ionization potential.

20. The method of claim 19 wherein the first and second electrodes are provided such that the first material has a first work function and the second material has a second work function that is different than the first work function.

21. The method of claim 19 wherein the first and second electrodes are provided such that the first gap is less than 200 nanometers.

22. The method of claim 19 wherein the first and second electrodes are provided such that the first gap is less than or equal to 100 nanometers.

23. The method of claim 19 further comprising providing the substrate such that it includes a first layer comprising third material that is a doped semiconductor;

wherein the first and second electrodes are provided by patterning the first layer to define a first region and a second region, the first region including the first electrode and the second region including the second electrode; and

wherein each of the first material and second material is the third material.

24. The method of claim 23 wherein the first layer is patterned to define a first field including the first region, the second region, and a neck that is between the first region and second region, wherein the first region, the second region, and neck are contiguous, and wherein the method further comprises:

oxidizing the first field to form an oxide region, wherein the oxide region includes the neck; and

removing the oxide region.

25. The method of claim 23 further comprising:

forming a second layer on the first layer, the second layer comprising a fourth material that is a dielectric;

forming a third layer on the second layer, the third layer comprising a fifth material that is electrically conductive;

patterning the second layer to define a third region and a fourth region, wherein the third region is disposed on the first region and the fourth region is disposed on the second region; and

patterning the third layer to define a fifth region and a sixth region, wherein the fifth region is disposed on the third region and the sixth region is disposed on the fourth region, and wherein the fifth region defines a third electrode and the sixth region defines a fourth electrode;

wherein the first region, third region, and fifth region have the same shape and are aligned; and

wherein the second region, fourth region, and sixth region have the same shape and are aligned.

26. The method of claim 25 further wherein the third electrode is dimensioned and arranged such that a voltage applied between the third electrode and the first electrode reduces the concentration of free charge carriers in the first electrode.

27. The method of claim 26 further wherein the fourth electrode is dimensioned and arranged such that a voltage applied between the fourth electrode and the second electrode reduces the concentration of free charge carriers in the second electrode, wherein the third electrode and fourth electrode are electrically connected.

28. The method of claim 19 further comprising:

providing the substrate such that it includes a first layer that is a dielectric layer; and

etching a first region of the first layer to reduce its thickness in the first region;

wherein the first electrode and second electrode are provided such that they are disposed on the first layer and the first gap exposes the first region.

29. The method of claim 19 further comprising forming a chamber that encloses an environment, wherein the gap is within the chamber, and wherein the environment has a pressure that is substantially equal to atmospheric pressure.

30. The method of claim 19 wherein each of the first and second electrodes is provided such that it has a tip whose minimum width is at least 40 nm.

31. The method of claim 19 wherein each of the first and second electrodes is provided such that it has a tip having a radius of curvature that is at least 20 nm.