INCREASING CAPACITY IN WIRELESS COMMUNICATIONS

• US 20170251473A1
• Filed: 05/11/2017
• Published: 08/31/2017
• Est. Priority Date: 11/27/2009
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Xue, Yisheng, Fan, Mingxe, Liang, Jiye
• Granted Patent: US 10,790,861 B2
• Time in Patent Office: Days
• CPC Class Codes: H03M 13/09 Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
• CPC Class Codes: H03M 13/23 using convolutional codes, e.g. unit memory codes
• CPC Class Codes: H03M 13/235 Encoding of convolutional codes, e.g. methods or arrangements for parallel or block-wise encoding
• CPC Class Codes: H03M 13/3938 Tail-biting H03M13/2996 takes precedence
• CPC Class Codes: H03M 13/41 using the Viterbi algorithm or Viterbi processors
• CPC Class Codes: H03M 13/413 tail biting Viterbi decoding
• CPC Class Codes: H03M 13/63 Joint error correction and other techniques H03M13/31 and H03M13/33 take precedence
• CPC Class Codes: H03M 13/6306 Error control coding in combination with Automatic Repeat reQuest [ARQ] and diversity transmission, e.g. coding schemes for the multiple transmission of the same information or the transmission of incremental redundancy H03M13/3761, H03M13/3769 and H03M13/635 take precedence
• CPC Class Codes: H03M 13/6525 3GPP LTE including E-UTRA
• CPC Class Codes: H03M 13/653 3GPP HSDPA, e.g. HS-SCCH or DS-DSCH related
• CPC Class Codes: H03M 13/6558 3GPP2
• CPC Class Codes: H04L 1/0003 by switching between different modulation schemes
• CPC Class Codes: H04L 1/0009 by adapting the channel coding H04L1/1812 takes precedence
• CPC Class Codes: H04L 1/0052 Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables
• CPC Class Codes: H04L 1/1671 the supervisory signal being transmitted together with control information
• CPC Class Codes: H04L 1/1822 involving configuration of automatic repeat request [ARQ] with parallel processes
• CPC Class Codes: H04L 1/1887 Scheduling and prioritising arrangements
• CPC Class Codes: H04L 5/0046 Determination of how many bits are transmitted on different sub-channels
• CPC Class Codes: H04W 52/325 Power control of control or pilot channels

Abstract

Techniques to increase the capacity of a W-CDMA wireless communications system. In an exemplary embodiment, early termination of one or more transport channels on a W-CDMA wireless communications link is provided. In particular, early decoding is performed on slots as they are received over the air, and techniques are described for signaling acknowledgment messages (ACK'"'"'s) for one or more transport channels correctly decoded to terminate the transmission of those transport channels. The techniques may be applied to the transmission of voice signals using the adaptive multi-rate (AMR) codec. Further exemplary embodiments describe aspects to reduce the transmission power and rate of power control commands sent over the air, as well as aspects for applying tail-biting convolutional codes in the system.

Claims

1. A method of wireless communication, comprising:

during a first allotted transmission time interval (TTI) comprising a plurality of slots, receiving a composite channel comprising a plurality of transport channels;

determining whether to attempt to decode a first transport channel of the plurality of transport channels before receiving all slots of the plurality of slots of the first allotted TTI; and

attempting to decode said first transport channel in response to said determining whether to attempt to decode,

wherein the determining whether to attempt to decode is by reference to an integer N, whereby an attempt is made based on an interval of N slots within a TTI.

2. The method of claim 1, wherein the integer N varies over time such that the determining whether to attempt to decode is by reference to an aperiodic duration within the TTI.

3. The method of claim 1, wherein the integer N is constant over time such that the determining whether to attempt to decode is indicated to proceed every 3 slots, or 2 ms.

4. The method of claim 1, further comprising:

determining a cyclic redundancy check (CRC) value based on data bits of the decoded first transport channel;

checking integrity of the first transport channel by comparing the determined CRC value with a received CRC value of the first transport channel; and

terminating slot decoding for the first transport channel prior to the end of the TTI.

5. The method of claim 4,

wherein the first transport channel, comprising the received CRC value, further comprises class A adaptive multi-rate (AMR) bits;

and

wherein the plurality of transport channels further comprises a second transport channel of the plurality of transport channels, comprising at least one of class B AMR bits or class C AMR bits, and omitting a CRC value.

6. The method of claim 5, wherein at least one of the plurality of transport channels is encoded using a tail-biting convolutional code.

7. The method of claim 1, further comprising:

attempting to decode a second transport channel of the plurality of transport channels before receiving all slots of the plurality of slots of the first allotted TTI,

wherein the attempting to decode the second transport channel is offset in time from the attempting to decode the first transport channel, based on a decoding time for the attempting to decode the first transport channel.

8. The method of claim 1, wherein the composite channel comprises:

an adaptive multi-rate (AMR) NULL packet comprising a dedicated physical data channel (DPDCH), wherein the DPDCH portion of the AMR NULL packet is blanked; and

at least one of an AMR FULL packet or a silence indicator (SID) packet,

the method further comprising performing outer-loop power control (OLPC) for the composite channel based on the at least one of the AMR FULL packet or the SID packet, without updating the OLPC based on the AMR NULL packet.

9. The method of claim 1, wherein the composite channel comprises an adaptive multi-rate (AMR) NULL packet comprising a dedicated physical control channel (DPCCH), wherein the DPCCH portion of the AMR NULL packet is gated according to a gating pattern based on a power control rate for the composite channel.

10. A user equipment (UE) configured for wireless communication, comprising:

a processing unit;

a memory communicatively coupled to the processing unit; and

transmit circuitry communicatively coupled to the processing unit,

wherein the processing unit is configured to;

during a first allotted transmission time interval (TTI) comprising a plurality of slots, receive a composite channel comprising a plurality of transport channels;

determine whether to attempt to decode a first transport channel of the plurality of transport channels before receiving all slots of the plurality of slots of the first allotted TTI; and

attempt to decode said first transport channel in response to said determining whether to attempt to decode,

wherein the determining whether to attempt to decode is by reference to an integer N, whereby an attempt is made based on an interval of N slots within a TTI.

11. The UE of claim 10, wherein the integer N varies over time such that the determining whether to attempt to decode is by reference to an aperiodic duration within the TTI.

12. The UE of claim 10, wherein the integer N is constant over time such that the determining whether to attempt to decode is indicated to proceed every 3 slots, or 2 ms.

13. The UE of claim 10, wherein the processing unit is further configured to:

determine a cyclic redundancy check (CRC) value based on data bits of the decoded first transport channel;

check integrity of the first transport channel by comparing the determined CRC value with a received CRC value of the first transport channel; and

terminate slot decoding for the first transport channel prior to the end of the TTI.

14. The UE of claim 13,

wherein the first transport channel, comprising the received CRC value, further comprises class A adaptive multi-rate (AMR) bits;

and

wherein the plurality of transport channels further comprises a second transport channel of the plurality of transport channels, comprising at least one of class B AMR bits or class C AMR bits, and omitting a CRC value.

15. The UE of claim 14, wherein at least one of the plurality of transport channels is encoded using a tail-biting convolutional code.

16. The UE of claim 10, wherein the processing unit is further configured to:

attempt to decode a second transport channel of the plurality of transport channels before receiving all slots of the plurality of slots of the first allotted TTI,

wherein the attempting to decode the second transport channel is offset in time from the attempting to decode the first transport channel, based on a decoding time for the attempting to decode the first transport channel.

17. The UE of claim 10, wherein the composite channel comprises:

an adaptive multi-rate (AMR) NULL packet comprising a dedicated physical data channel (DPDCH), wherein the DPDCH portion of the AMR NULL packet is blanked; and

at least one of an AMR FULL packet or a silence indicator (SID) packet,

wherein the processing unit is further configured to perform outer-loop power control (OLPC) for the composite channel based on the at least one of the AMR FULL packet or the SID packet, without updating the OLPC based on the AMR NULL packet.

18. The UE of claim 10, wherein the composite channel comprises an adaptive multi-rate (AMR) NULL packet comprising a dedicated physical control channel (DPCCH), wherein the DPCCH portion of the AMR NULL packet is gated according to a gating pattern based on a power control rate for the composite channel.

19. A user equipment (UE) configured for wireless communication, comprising:

means for, during a first allotted transmission time interval (TTI) comprising a plurality of slots, receiving a composite channel comprising a plurality of transport channels;

means for determining whether to attempt to decode a first transport channel of the plurality of transport channels before receiving all slots of the plurality of slots of the first allotted TTI; and

means for attempting to decode said first transport channel in response to said determining whether to attempt to decode,

wherein the means for determining whether to attempt to decode is configured to determine whether to attempt to decode by reference to an integer N, whereby an attempt is made based on an interval of N slots within a TTI.

20. The UE of claim 19, wherein the integer N varies over time such that the determining whether to attempt to decode is by reference to an aperiodic duration within the TTI.

21. The UE of claim 19, wherein the integer N is constant over time such that the determining whether to attempt to decode is indicated to proceed every 3 slots, or 2 ms.

22. The UE of claim 19, further comprising:

means for determining a cyclic redundancy check (CRC) value based on data bits of the decoded first transport channel;

means for checking integrity of the first transport channel by comparing the determined CRC value with a received CRC value of the first transport channel; and

means for terminating slot decoding for the first transport channel prior to the end of the TTI.

23. The UE of claim 22,

wherein the first transport channel, comprising the received CRC value, further comprises class A adaptive multi-rate (AMR) bits;

and

wherein the plurality of transport channels further comprises a second transport channel of the plurality of transport channels, comprising at least one of class B AMR bits or class C AMR bits, and omitting a CRC value.

24. The UE of claim 23, wherein at least one of the plurality of transport channels is encoded using a tail-biting convolutional code.

25. The UE of claim 19, further comprising:

means for attempting to decode a second transport channel of the plurality of transport channels before receiving all slots of the plurality of slots of the first allotted TTI,

wherein the means for attempting to decode the second transport channel is configured to attempt to decode the second transport channel offset in time from the attempt to decode the first transport channel, based on a decoding time for the attempting to decode the first transport channel.

26. The UE of claim 19, wherein the composite channel comprises:

an adaptive multi-rate (AMR) NULL packet comprising a dedicated physical data channel (DPDCH), wherein the DPDCH portion of the AMR NULL packet is blanked; and

at least one of an AMR FULL packet or a silence indicator (SID) packet,

wherein the UE further comprises means for performing outer-loop power control (OLPC) for the composite channel based on the at least one of the AMR FULL packet or the SID packet, without updating the OLPC based on the AMR NULL packet.

27. The UE of claim 19, wherein the composite channel comprises an adaptive multi-rate (AMR) NULL packet comprising a dedicated physical control channel (DPCCH), wherein the DPCCH portion of the AMR NULL packet is gated according to a gating pattern based on a power control rate for the composite channel.

28. A computer-readable medium storing computer-executable code, comprising:

instructions for causing a computer to, during a first allotted transmission time interval (TTI) comprising a plurality of slots, receive a composite channel comprising a plurality of transport channels;

instructions for causing a computer to determine whether to attempt to decode a first transport channel of the plurality of transport channels before receiving all slots of the plurality of slots of the first allotted TTI; and

instructions for causing a computer to attempt to decode said first transport channel in response to said determining whether to attempt to decode,

wherein the instructions for causing a computer to determine whether to attempt to decode are configured to attempt to decode by reference to an integer N, whereby an attempt is made based on an interval of N slots within a TTI.

29. The computer-readable medium of claim 28, wherein the integer N varies over time such that the determining whether to attempt to decode is by reference to an aperiodic duration within the TTI.

30. The computer-readable medium of claim 28, wherein the integer N is constant over time such that the determining whether to attempt to decode is indicated to proceed every 3 slots, or 2 ms.

31. The computer-readable medium of claim 28, further comprising:

instructions for causing a computer to determine a cyclic redundancy check (CRC) value based on data bits of the decoded first transport channel;

instructions for causing a computer to check integrity of the first transport channel by comparing the determined CRC value with a received CRC value of the first transport channel; and

instructions for causing a computer to terminate slot decoding for the first transport channel prior to the end of the TTI.

32. The computer-readable medium of claim 31,

wherein the first transport channel, comprising the received CRC value, further comprises class A adaptive multi-rate (AMR) bits;

and

wherein the plurality of transport channels further comprises a second transport channel of the plurality of transport channels, comprising at least one of class B AMR bits or class C AMR bits, and omitting a CRC value.

33. The computer-readable medium of claim 32, wherein at least one of the plurality of transport channels is encoded using a tail-biting convolutional code.

34. The computer-readable medium of claim 28, further comprising:

instructions for causing a computer to attempt to decode a second transport channel of the plurality of transport channels before receiving all slots of the plurality of slots of the first allotted TTI,

wherein the instructions for causing a computer to attempt to decode the second transport channel are configured to attempt to decode the second transport channel offset in time from the attempt to decode the first transport channel, based on a decoding time for the attempting to decode the first transport channel.

35. The computer-readable medium of claim 28, wherein the composite channel comprises:

an adaptive multi-rate (AMR) NULL packet comprising a dedicated physical data channel (DPDCH), wherein the DPDCH portion of the AMR NULL packet is blanked; and

at least one of an AMR FULL packet or a silence indicator (SID) packet,

wherein the computer-readable medium further comprises instructions for causing a computer to perform outer-loop power control (OLPC) for the composite channel based on the at least one of the AMR FULL packet or the SID packet, without updating the OLPC based on the AMR NULL packet.

36. The computer-readable medium of claim 28, wherein the composite channel comprises an adaptive multi-rate (AMR) NULL packet comprising a dedicated physical control channel (DPCCH), wherein the DPCCH portion of the AMR NULL packet is gated according to a gating pattern based on a power control rate for the composite channel.