Method of Manufacturing Molded Semiconductor Packages Having an Optical Inspection Feature

• US 20170256509A1
• Filed: 03/03/2016
• Published: 09/07/2017
• Est. Priority Date: 03/03/2016
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Lee, Swee Kah, Chong, Hock Heng, Ng, Mei Chin, Soriano, Aileen Manantan, Lum, Fong Mei, Muhammat Sanusi, Muhammad, Goh, Soon Lock
• Granted Patent: US 9,806,043 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/6836 Wafer tapes, e.g. grinding or dicing support tapes adhesive tapes in general C09J7/20
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 2224/0381 Cleaning, e.g. oxide removal step, desmearing
• CPC Class Codes: H01L 2224/03825 Plating, e.g. electroplating, electroless plating
• CPC Class Codes: H01L 2224/05655 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/16245 the item being metallic
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/293 Organic, e.g. plastic
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/49503 characterised by the die pad
• CPC Class Codes: H01L 23/49541 Geometry of the lead-frame
• CPC Class Codes: H01L 23/49548 Cross section geometry H01L23/49562 takes precedence
• CPC Class Codes: H01L 23/49582 Metallic layers on lead frames
• CPC Class Codes: H01L 24/03 Manufacturing methods
• CPC Class Codes: H01L 24/06 of a plurality of bonding areas
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/181 : Encapsulation

Abstract

A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads are also embedded in the mold compound and electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.

Claims

1. A method of manufacturing molded semiconductor packages, the method comprising:

providing a molded semiconductor substrate comprising a mold compound in which semiconductor dies and metal pads are embedded, each metal pad being electrically connected to one of the semiconductor dies and uncovered by the mold compound at a first main surface of the mold compound;

singulating the molded semiconductor substrate into individual molded packages each of which comprises one or more of the semiconductor dies and the corresponding metal pads, each metal pad having a bottom face uncovered by the mold compound at the first main surface, the metal pads disposed around a periphery of each molded package also having a side face uncovered by the mold compound at an edge along which the molded packages were singulated;

immersing the molded packages in a chemical bath which roughens the bottom face of each metal pad and removes burrs from the side face of the metal pads disposed around the periphery of each molded package; and

plating the faces of the metal pads uncovered by the mold compound after immersing the molded packages in the chemical bath.

2. The method of claim 1, wherein the chemical bath is selected from the group consisting of:

a hydrogen peroxide solution;

a ferric chloride solution;

a salt solution;

copper sulfate; and

ferric sulfate.

3. The method of claim 1, wherein the chemical bath comprises sodium persulfate.

4. The method of claim 1, wherein the faces of the metal pads uncovered by the mold compound are plated by electroless plating.

5. The method of claim 4, wherein the electroless plating comprises an electroless nickel immersion gold (ENIG) process in which a layer of nickel-phosphorus or nickel-boron alloy is deposited on the faces of the metal pads uncovered by the mold compound and then covered with a layer of gold.

6. The method of claim 5, further comprising:

introducing a catalyst for the electroless plating prior to depositing the layer of nickel-phosphorus or nickel-boron alloy.

7. The method of claim 6, wherein the metal pads comprise copper, wherein the catalyst comprises palladium, and wherein the faces of the metal pads uncovered by the mold compound have a palladium-catalyzed copper surface prior to depositing the layer of nickel-phosphorus or nickel-boron alloy.

8. The method of claim 1, further comprising:

cleaning the molded packages in an acidic solution before immersing the molded packages in the chemical bath; and

rinsing the molded packages after cleaning the molded packages in the acidic solution and before immersing the molded packages in the chemical bath.

9. The method of claim 1, further comprising:

covering the plated faces of the metal pads with a protective layer.

10. The method of claim 1, wherein between about 3 to 15 microns of metal is etched away from the faces of the metal pads uncovered by the mold compound while the molded packages are immersed in the chemical bath.

11. The method of claim 1, wherein the molded semiconductor substrate is temporarily fixed to a UV curable tape at least during the immersing and the plating, and wherein the UV curable tape has a heat resistance and a chemical resistance such that the UV curable tape can withstand the chemical bath.

12. The method of claim 1, wherein the molded semiconductor substrate is singulated into the individual molded packages using a single-step sawing process.

21. The method of claim 11, wherein the UV curable tape remains intact after singulating the molded semiconductor substrate.

13-20. -20. (canceled)