METHOD AND SYSTEM FOR PROVIDING A MAGNETIC JUNCTION USABLE IN SPIN TRANSFER TORQUE APPLICATIONS USING MULTIPLE STACK DEPOSITIONS
First Claim
1. A method for providing a plurality of magnetic junctions residing on a substrate, each of the plurality of magnetic junctions including a free layer, the method comprising:
- providing a first portion of a stack for the plurality of magnetic junctions, the first portion of a stack including at least one magnetic layer for the free layer;
providing a hard mask on the first portion of the stack, the hard mask covering a first part of the first portion of the stack corresponding to the plurality of magnetic junctions, the hard mask including at least one aperture exposing a second part of the first portion of the stack corresponding to at least one spacing between the plurality of magnetic junctions, the at least one spacing being not more than fifty nanometers;
etching the second part of the first portion of the stack, a remaining part of the first portion of the stack forming a first portion of each of the plurality of magnetic junctions, the first portion of each of the plurality of magnetic junctions including the free layer;
providing a second portion of the stack for the plurality of magnetic junctions.
1 Assignment
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Accused Products
Abstract
A method for providing magnetic junctions is described. Each magnetic junction includes a free layer. A first portion of a stack for the magnetic junctions is provided. The first portion of a stack includes magnetic layer(s) for the free layer. A hard mask is provided. The hard mask covers a part of the first portion of the stack corresponding to the magnetic junctions. The hard mask includes aperture(s) exposing a second part of the first portion of the stack corresponding to spacing(s) between the magnetic junctions. The spacing(s) are not more than fifty nanometers. The second part of the first portion of the stack is etched. A remaining part of the first portion of the stack forms a first portion of each magnetic junction. This first portion of each magnetic junction includes the free layer. A second portion of the stack for the magnetic junctions is also provided.
24 Citations
20 Claims
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1. A method for providing a plurality of magnetic junctions residing on a substrate, each of the plurality of magnetic junctions including a free layer, the method comprising:
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providing a first portion of a stack for the plurality of magnetic junctions, the first portion of a stack including at least one magnetic layer for the free layer; providing a hard mask on the first portion of the stack, the hard mask covering a first part of the first portion of the stack corresponding to the plurality of magnetic junctions, the hard mask including at least one aperture exposing a second part of the first portion of the stack corresponding to at least one spacing between the plurality of magnetic junctions, the at least one spacing being not more than fifty nanometers; etching the second part of the first portion of the stack, a remaining part of the first portion of the stack forming a first portion of each of the plurality of magnetic junctions, the first portion of each of the plurality of magnetic junctions including the free layer; providing a second portion of the stack for the plurality of magnetic junctions. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 14)
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13. A method for providing a plurality of magnetic junctions, each of the plurality of magnetic junctions including a pinned layer, a free layer and a nonmagnetic tunneling barrier layer between the pinned layer and the free layer, the method comprising:
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providing a first plurality of layers for the plurality of magnetic junctions, the first plurality of layers including a magnetic layer for the free layer and an Mg layer on the magnetic layer; providing a carbon hard mask on the Mg layer, the carbon hard mask covering a first portion of the first plurality of layers corresponding to the plurality of magnetic junctions, the carbon hard mask including at least one aperture exposing a second portion of the first plurality of layers corresponding to at least one spacing between the plurality of magnetic junctions, the at least one spacing being not more than fifty nanometers; ion beam etching the second portion of the first plurality of layers, a remaining portion of the first plurality of layers forming a first portion of each of the plurality of magnetic junctions, the first portion including the free layer, the free layer for each the plurality of magnetic junctions being at the at least one spacing; providing an insulating refill between the first portion of each of the plurality of magnetic junctions; removing the carbon hard mask using an oxygen reactive ion etch, the oxygen reactive ion etch oxidizing the Mg layer to provide an MgO layer, the MgO layer forming at least a portion of the nonmagnetic tunneling barrier layer; providing a second plurality of layers forming a second portion of the stack for the plurality of magnetic junctions, the second plurality of layers including an additional magnetic layer for a pinned layer for each of the plurality of magnetic junctions.
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15. A memory magnetic junction residing on a substrate and comprising:
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a plurality of magnetic storage cells, each of the plurality of magnetic storage cells including at least one magnetic junction, the at least one magnetic junction including a free layer, a pinned layer and a nonmagnetic spacer layer between the pinned layer and the free layer, the free layer being switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction, the plurality of storage cells being separated by at least one spacing of not more than fifty nanometers, the free layer for each of the at least one magnetic junction being closer to the substrate than the pinned layer, the free layer having a first lateral dimension, the pinned layer having a second lateral dimension not smaller than the first lateral dimension; and a plurality of conductive lines coupled to the plurality of magnetic storage cells. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification