SEMICONDUCTOR MEMORY DEVICE
First Claim
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1. A semiconductor memory device, comprising:
- a substrate;
a first interconnect provided on one side of the substrate in a first direction;
a second interconnect provided on the one side of the first interconnect;
a plurality of third interconnects extending in a second direction, being arranged to be separated from each other along the first direction, and being provided on the one side of the second interconnect, the second direction crossing the first direction;
a fourth interconnect provided on the one side of the third interconnects;
a semiconductor member extending in the first direction and piercing the plurality of third interconnects, one end portion of the semiconductor member being connected to the second interconnect;
a charge storage member provided between the semiconductor member and one of the plurality of third interconnects; and
a conductive member connected between the first interconnect and the fourth interconnect and insulated from the second interconnect and the plurality of third interconnects,one of the plurality of third interconnects being disposed on two second-direction sides of the conductive member, and portions of the one of the plurality of third interconnects disposed on the two second-direction sides of the conductive member being formed as one body.
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Abstract
According to one embodiment, a semiconductor memory device includes: a substrate; a first interconnect; a second interconnect; a plurality of third interconnects; a fourth interconnect; a semiconductor member; a charge storage member; and a conductive member. One of the plurality of third interconnects is disposed on two second-direction sides of the conductive member. Portions of the one of the plurality of third interconnects disposed on the two second-direction sides of the conductive member are formed as one body.
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Citations
17 Claims
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1. A semiconductor memory device, comprising:
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a substrate; a first interconnect provided on one side of the substrate in a first direction; a second interconnect provided on the one side of the first interconnect; a plurality of third interconnects extending in a second direction, being arranged to be separated from each other along the first direction, and being provided on the one side of the second interconnect, the second direction crossing the first direction; a fourth interconnect provided on the one side of the third interconnects; a semiconductor member extending in the first direction and piercing the plurality of third interconnects, one end portion of the semiconductor member being connected to the second interconnect; a charge storage member provided between the semiconductor member and one of the plurality of third interconnects; and a conductive member connected between the first interconnect and the fourth interconnect and insulated from the second interconnect and the plurality of third interconnects, one of the plurality of third interconnects being disposed on two second-direction sides of the conductive member, and portions of the one of the plurality of third interconnects disposed on the two second-direction sides of the conductive member being formed as one body. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A semiconductor memory device, comprising:
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a substrate; a plurality of first interconnects provided on one side of the substrate in a first direction; a second interconnect provided on the one side of the first interconnects; a plurality of third interconnects extending in a second direction, being provided on the one side of the second interconnect, and being arranged to be separated from each other along the first direction, the second direction crossing the first direction; a plurality of fourth interconnects provided on the one side of the third interconnects; a plurality of semiconductor members extending in the first direction and piercing the plurality of third interconnects, one end portion of the plurality of semiconductor members being connected to the second interconnect; a charge storage member provided between one of the plurality of third interconnects and one of the plurality of semiconductor members; and a plurality of conductive members connected between the plurality of first interconnects and the plurality of fourth interconnects and insulated from the second interconnect and the plurality of third interconnects, one of the plurality of third interconnects being disposed on one side in a third direction when viewed from one of the plurality of conductive members, the third direction crossing a plane including the first direction and the second direction. - View Dependent Claims (11, 12, 13, 14, 15)
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16. A semiconductor memory device, comprising:
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a substrate; a first interconnect provided on one side of the substrate in a first direction; a second interconnect provided on the one side of the first interconnect; a plurality of third interconnects extending in a second direction, being provided on the one side of the second interconnect, and being arranged to be separated from each other along the first direction, the second direction crossing the first direction; a fourth interconnect provided on the one side of the third interconnects; a semiconductor member extending in the first direction and piercing the plurality of third interconnects, one end portion of the semiconductor member being connected to the second interconnect; a charge storage member provided between the semiconductor member and one of the plurality of third interconnects; and a conductive member connected between the first interconnect and the fourth interconnect and insulated from the second interconnect and the plurality of third interconnects, one of the plurality of third interconnects being disposed on one side in a third direction when viewed from the conductive member, the third direction crossing a plane including the first direction and the second direction. - View Dependent Claims (17)
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Specification