Selective Rasterization

• US 20170264106A1
• Filed: 05/25/2017
• Published: 09/14/2017
• Est. Priority Date: 10/07/2013
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Akenine-Moller, Tomas G., Munkberg, Carl J., Clarberg, Franz P.
• Granted Patent: US 10,164,459 B2
• Time in Patent Office: Days
• CPC Class Codes: G01R 19/0092 measuring current only all subgroups of G01R19/00 take precedence
• CPC Class Codes: G06T 11/40 Filling a planar surface by adding surface attributes, e.g. colour or texture
• CPC Class Codes: H02J 2207/40 adapted for charging from various sources, e.g. AC, DC or multivoltage
• CPC Class Codes: H02J 7/00 Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

Abstract

According to one embodiment, a given tile, made up of pixels or samples, may be of any shape, including a square shape. These pixels may contain colors, depths, stencil values, and other values. Each tile may be further augmented with a single bit, referred to herein as a render bit. In one embodiment, if the render bit is one, then everything is rendered as usual within the tile. However, if the render bit is zero, then nothing is rasterized to this tile and, correspondingly, depth tests, pixel shading, frame buffer accesses, and multi-sampled anti-aliasing (MSAA) resolves are not done for this tile. In other embodiments, some operations may be done nevertheless, but at least one operation is avoided based on the render bit. Of course, the render bits may be switched such that the bit zero indicates that everything should be rendered and the bit one indicates more limited rendering.

Claims

1. A graphics processing unit comprising:

circuitry to;

organize pixels, generated in response to execution of a draw call, into tiles; and

develop identification values for a first and a second tile using position information from the draw call;

a rendering device to;

render the second tile;

check the identification value for the first tile after rendering the position information to determine whether the identification value of the first tile matches the identification value of the rendered second tile;

if the first tile matches the second tile, forego at least part of rendering for the first tile; and

the graphics processing unit to render the first tile completely if the first tile does not match the identification value of the prior second tile.

2. The graphics processing unit of claim 1, said rendering device to indicate whether to render a tile at all before rasterizing on a tile level in a rasterizer.

3. The graphics processing unit of claim 2, said rendering device to use content from the second tile in place of the first tile if rasterization of the first tile is not to be done.

4. The graphics processing unit of claim 1, including a frame buffer coupled to said rendering device.

5. A system comprising:

a graphics processing unit to;

organize pixels generated in response to execution of a draw call into tiles;

develop identification values for a first and second tile using a position part of the draw call;

render the second tile;

check the identification value for the first tile after rendering the position part to determine whether the identification value of the first tile matches the identification value of the rendered second tile;

if the first tile matches the second tile, forego at least part of rendering for the first tile;

render the first tile if the first tile does not match the identification value of the prior second tile; and

a storage coupled to said graphics processing unit.

6. The system of claim 5, said graphics processing unit to indicate whether to render a tile at all before rasterizing on a tile level in a rasterizer.

7. The system of claim 6, said graphics processing unit to use content from the second tile in place of the first tile if rasterization of the first tile is not to be done.

8. The system of claim 5, including a frame buffer coupled to said graphics processing unit.

9. The system of claim 5 including a memory controller.

10. The system of claim 5 including a central processing unit.

11. The system of claim 5 including a display.

12. The system of claim 5 including a modem.

13. A method comprising:

organizing pixels, generated in response to execution of a draw call, into tiles;

developing identification values for a first and a second tile using a position information of the draw cell for the first tile;

rendering the second tile;

checking the identification value for the first tile after rendering the position part to determine whether the identification value of the first tile matches the identification value of the rendered second tile;

if the first tile matches the second tile, foregoing at least part of rendering for the first tile; and

rendering the first tile completely if the first tile does not match the identification value of the prior second tile.

14. The method of claim 13, including indicating whether to render a tile at all before rasterizing on a tile level in a rasterizer.

15. The method of claim 14, including using content from the second tile in place of the first tile if rasterization of the first tile is not to be done.

16. One or more non-transitory computer readable media storing instructions to perform a sequence comprising:

organizing pixels, generated in response to execution of a draw call, into tiles;

developing identification values for a first and a second tile using a position information of the draw cell for the first tile;

rendering the second tile;

checking the identification value for the first tile after rendering the position part to determine whether the identification value of the first tile matches the identification value of the rendered second tile;

if the first tile matches the second tile, foregoing at least part of rendering for the first tile; and

rendering device to render the first tile completely if the first tile does not match the identification value of the prior second tile.

17. The media of claim 16, further storing instructions to perform a sequence indicating whether to render a tile at all before rasterizing on a tile level in a rasterizer.

18. The media of claim 17, further storing instructions to perform a sequence including using content from the second tile in place of the first tile if rasterization of the first tile is not to be done.

19. An apparatus comprising:

means for organizing pixels, generated in response to execution of a draw call into tiles, developing identification values for a first and second tile using a position information of the draw call for the first tile;

means for rending the second tile;

means for checking the identification value for the first tile after rendering the position part to determine whether the identification value of the first tile matches the identification value of the rendered second tile, and if the first tile matches the second tile, forego at least part of rendering for the first tile;

means for rendering the first tile completely if the first tile does not match the identification value of the rendered second tile;

means for foregoing at least part of rendering for the first tile if the first tile matches the second tile; and

means for rendering the first tile completely if the first tile does not match the identification value of the prior second tile.

20. The apparatus of claim 19, including means for indicating whether to render a tile at all before rasterizing on a tile level in a rasterizer.

21. The apparatus of claim 20, including means for using content from the second tile in place of the first tile if rasterization of the first tile is not to be done.

22. The apparatus of claim 19, including a frame buffer.