DISPLAY PANEL AND DRIVING METHOD THEREOF, AND DISPLAY APPARATUS
1 Assignment
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Accused Products
Abstract
A display panel is provided which includes a plurality of gate lines extending in a first direction, a plurality of data lines extending in a second direction substantially perpendicular to the first direction, and a driving circuit. The driving circuit is arranged at an end of the data lines for supplying a scan signal to the gate lines and supplying grayscale signals to the data lines.
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Citations
20 Claims
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1. (canceled)
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2. A display panel comprising:
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a plurality of pixel units arranged in an array, each of the pixel units having a respective pixel thin-film transistor; a plurality of gate lines extending in a first direction, each of the gate lines connected to a respective row of pixel units in the array; a plurality of data lines extending in a second direction substantially perpendicular to the first direction, each of the data lines connected to a respective column of pixel units in the array; a driving circuit arranged at an end of the data lines and comprising; a plurality of common terminals for outputting a scan signal and respective grayscale signals; a switch network operable to selectively couple the common terminals to the gate lines or the data lines; and a driving unit configured to a) supply the scan signal sequentially to the plurality of common terminals in a plurality of first time periods that are temporally separate and cause, in each first time period in which the scan signal is supplied to one of the common terminals, the switch network to couple the plurality of common terminals to the plurality of gate lines respectively such that the scan signal is applied to one of the gate lines, and to b) supply, in each of second time periods immediately subsequent to respective first time periods, the grayscale signals to the plurality of common terminals and cause the switch network to couple each of the common terminals to a respective one of the data lines such that the grayscale signals are transferred to the array of pixel units; and a plurality of gate voltage storage capacitors each connected between a respective one of the gate lines and a predetermined voltage and operable to enable, after being charged by the scan signal applied to the respective gate line, the pixel thin-film transistors of a row of pixel units connected to the gate line to remain turned-on in the second time period in which the grayscale signals for the row of pixel units are supplied. - View Dependent Claims (3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification