SHIFT REGISTER, ITS DRIVING METHOD, GATE DRIVER CIRCUIT AND DISPLAY DEVICE

• US 20170269769A1
• Filed: 01/27/2016
• Published: 09/21/2017
• Est. Priority Date: 09/06/2015
• Status: Active Grant

• Current Assignee: BOE Technology Group Co., Ltd., Chengdu BOE Optoelectronics Technology Company Limited (BOE Technology Group Co., Ltd.)
• Original Assignee: BOE Technology Group Co., Ltd., Chengdu BOE Optoelectronics Technology Company Limited (BOE Technology Group Co., Ltd.)
• Inventors: HU, Like
• Granted Patent: US 9,791,968 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 3/0416 Control or interface arrangements specially adapted for digitisers
• CPC Class Codes: G06F 3/04166 Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184
• CPC Class Codes: G09G 2300/0408 Integration of the drivers onto the display substrate
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2310/0267 Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
• CPC Class Codes: G09G 2310/0283 Arrangement of drivers for different directions of scanning
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 5/003 Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto specific for a CRT G09G1/165; for a flat panel G09G3/2092
• CPC Class Codes: G11C 19/28 using semiconductor elements G11C19/14, G11C19/36 take precedence

Abstract

The present disclosure provides a shift register, its driving method, a gate driver circuit and a display device. The shift register includes an input module, a resetting module, a touch switching module, a node control module, a first output module and a second output module. In the shift register, through the cooperation of the above six modules, it is able to provide a touch stage between any two adjacent time periods of a display stage, it enables a driving signal output end of the shift register to output a DC signal at the touch stage, and enable the gate driver circuit to achieve a display function after the touch stage is ended.

Claims

1. A shift register, comprising an input module, a resetting module, a touch switching module, a node control module, a first output module and a second output module, wherein

a first end of the input module is configured to receive an input signal, a second end of the input module is configured to receive a first clock signal, and a third end of the input module is connected to a first node;

the input module is configured to enable the first node to be at a first potential in the case that the input signal and the first clock signal are both at the first potential;

a first end of the resetting module is configured to receive a resetting signal, a second end of the resetting module is configured to receive a third clock signal, and a third end of the resetting module is connected to the first node;

the resetting module is configured to enable the first node to be at the first potential in the case that the resetting signal and the third clock signal are both at the first potential;

a first end of the touch switching module is configured to receive a first touch-control signal, a second end of the touch switching module is connected to the first node, and a third end of the touch switching module is connected to a second node;

the touch switching module is configured to, under the control of the first touch-control signal, enable the first node to be electrically connected to the second node at a display stage, and enable the first node to be electrically disconnected from the second node at a touch stage;

a first end of the node control module is configured to receive a direct current (DC) signal, a second end of the node control module is configured to receive a fourth clock signal, a third end of the node control module is configured to receive a second touch-control signal, a fourth end of the node control module is connected to the first node, a fifth end of the node control module is connected to the second node, and a sixth end of the node control module is connected to a third node;

the node control module is configured to apply the DC signal to the first node in the case that the third node is at the first potential, apply the fourth clock signal to the third node in the case that the fourth clock signal is at the first potential, apply the second touch-control signal to the third node in the case that the second node is at the first potential, and maintain a voltage difference between the first end of the node control module and the third node to be a voltage difference within a previous time period in the case that the third node is in a floating state;

a first end of the first output module is connected to the second node, a second end of the first output module is configured to receive a second clock signal, and a third end of the first output module is connected to a driving signal output end of the shift register;

the first output module is configured to apply the second clock signal to the driving signal output end in the case that the second node is at the first potential, and maintain a voltage difference between the second node and the driving signal output end to be the voltage difference within the previous time period in the case that the second node is in the floating state;

a first end of the second output module is connected to the third node, a second end of the second output module is configured to receive the DC signal, and a third end of the second output module is connected to the driving signal output end;

the second output module is configured to apply the DC signal to the driving signal output end in the case that the third node is at the first potential;

in the case that a valid pulse signal of the input signal is at a high potential, the first potential is a high potential, the DC signal is at a low potential, and the second touch-control signal is at a low potential at the display stage and at a high potential at the touch stage; and

in the case that the valid pulse signal of the input signal is at a low potential, the first potential is a low potential, the DC signal is at a high potential, and the second touch-control signal is at the high potential at the display stage and at the low potential at the touch stage.

2. The shift register according to claim 1, further comprising a third output module,

a first end of the third output module is configured to receive a third touch-control signal, a second end of the third output module is configured to receive the DC signal, and a third end of the third output module is connected to the driving signal output end,

wherein the third output module is configured to apply the DC signal to the driving signal output end at the touch stage under the control of the third touch-control signal.

3. The shift register according to claim 1, wherein

the input module comprises a first switch transistor, a drain electrode of the first switch transistor is connected to the first node;

and

a gate electrode of the first switch transistor is configured to receive the input signal and a source electrode of the first switch transistor is configured to receive the first clock signal, or the gate electrode of the first switch transistor is configured to receive the first clock signal and the source electrode of the first switch transistor is configured to receive the input signal.

4. The shift register according to claim 1, wherein

the resetting module comprises a second switch transistor, a drain electrode of the second switch transistor is connected to the first node;

and

a gate electrode of the second switch transistor is configured to receive the resetting signal and a source electrode of the second switch transistor is configured to receive the third clock signal, or the gate electrode of the second switch transistor is configured to receive the third clock signal and the source electrode of the second switch transistor is configured to receive the resetting signal.

5. The shift register according to claim 1, wherein the touch switching module comprises a third switch transistor, a gate electrode of the third switch transistor is configured to receive the first touch-control signal, a source electrode of third switch transistor is connected to the first node, and a drain electrode of third switch transistor is connected to the second node.

6. The shift register according to claim 1, wherein the node control module comprises a fourth switch transistor, a fifth switch transistor, a sixth switch transistor and a first capacitor;

a gate electrode of the fourth switch transistor is connected to the third node, a source electrode of the fourth switch transistor is configured to receive the DC signal, and a drain electrode of the fourth switch transistor is connected to the first node;

a gate electrode and a source electrode of the fifth switch transistor are configured to receive the fourth clock signal, and a drain electrode of the fifth switch transistor is connected to the third node;

a gate electrode of the sixth switch transistor is connected to the second node, a source electrode of the sixth switch transistor is configured to receive the second touch-control signal, and a drain electrode of the sixth switch transistor is connected to the third node; and

one end of the first capacitor is connected to the third node, and the other end of the first capacitor is configured to receive the DC signal.

7. The shift register according to claim 1, wherein the first output module comprises a seventh switch transistor and a second capacitor;

a gate electrode of the seventh switch transistor is connected to the second node, a source electrode of the seventh switch transistor is configured to receive the second clock signal, and a drain electrode of the seventh switch transistor is connected to the driving signal output end; and

one end of the second capacitor is connected to the second node, and the other end of the second capacitor is connected to the driving signal output end.

8. The shift register according to claim 1, wherein the second output module comprises an eighth switch transistor, a gate electrode of the eighth switch transistor is connected to the third node, a source electrode of the eighth switch transistor is configured to receive the DC signal, and a drain electrode of the eighth switch transistor is connected to the driving signal output end.

9. The shift register according to claim 2, wherein the third output module comprises a ninth switch transistor, a gate electrode of the ninth switch transistor is configured to receive the third touch-control signal, a source electrode of the ninth switch transistor is configured to receive the DC signal, and a drain electrode of the ninth switch transistor is connected to the driving signal output end.

10. The shift register according to claim 1, wherein

in the case that the valid pulse signal of the input signal is at a high potential, all of the switch transistors are N-type transistors;

and

in the case that the valid pulse signal of the input signal is at a low potential, all of the switch transistors are P-type transistors.

11. A gate driver circuit comprising a plurality of shift registers each according to claim 1, wherein

the plurality of shift registers are connected in a cascaded manner;

an input signal is applied to a first-level shift register through a start signal end;

apart from the first-level shift register, an input signal is applied to a current-level shift register through a driving signal output end of a previous-level shift register connected to the current-level shift register; and

apart from a last-level shift register, a resetting signal is applied to the current-level shift register through a driving signal output end of a next-level shift register connected to the current-level shift register.

12. A display device comprising the gate driver circuit according to claim 11.

13. A method for driving the shift register according to claim 1, comprising a display stage and a touch stage, wherein

the display stage comprises a first stage, a second stage, a third stage and a fourth stage;

at the first stage, the input module applies the first clock signal to the first node under the control of the input signal, the touch switching module enables the first node to be electrically connected to the second node and applies a potential at the first node to the second node under the control of the first touch-control signal, the node control module applies the second touch-control signal to the third node under the control of the potential at the second node, and the first output module applies the second clock signal to the driving signal output end under the control of the potential at the second node;

at the second stage, the second node is in a floating state, the first output module maintains a voltage difference between the second node and the driving signal output end to be a voltage difference within a previous time period, and applies the second clock signal to the driving signal output end under the control of the potential at the second node, and the node control module applies the second touch-control signal to the third node under the control of the potential at the second node;

at the third stage, the resetting module applies the third clock signal to the first node under the control of the resetting signal, the touch switching module enables the first node to be electrically connected to the second node and applies the potential at the first node to the second node under the control of the first touch-control signal, the node control module applies the second touch-control signal to the third node under the control of the potential at the second node, and the first output module applies the second clock signal to the driving signal output end under the control of the potential at the second node;

at the fourth stage, the node control module applies the fourth clock signal to the third node under the control of the fourth clock signal, and applies the DC signal to the first node under the control of the potential at the third node, the touch switching module enables the first node to be electrically connected to the second node and applies the potential at the first node to the second node under the control of the first touch-control signal, and the second output module applies the DC signal to the driving signal output end under the control of the potential at the third node; and

at the touch stage,

the touch switching module enables the first node to be electrically disconnected from the second node under the control of the first touch-control signal; and

the second node is in the floating stage, the first output module maintains a voltage difference between the second node and the driving signal output end to be the voltage difference within the previous time period, and the node control module applies the second touch-control signal to the third node under the control of the second node;

or the third node is in a floating state, the node control module maintains a voltage difference between the first end of the node control module and the third node to be the voltage difference within the previous time period, and the second output module applies the DC signal to the driving signal output end under the control of the potential at the third node.

14. The method according to claim 13, wherein the touch stage is capable of being provided between any two adjacent ones of the first stage, the second stage, the third stage and the fourth stage of the display stage, or provided after the fourth stage of the display stage.

15. The method according to claim 14, wherein

in the case that the touch stage is provided between the first stage and the second stage, or between the second stage and the third stage, or between the third stage and the fourth stage, the touch switching module enables the first node to be electrically disconnected from the second node under the control of the first touch-control signal, the second node is in the floating state, the first output module maintains the voltage difference between the second node and the driving signal output end to be the voltage difference within the previous time period, and the node control module applies the second touch-control signal to the third node under the control of the second node, and the second output module applies the DC signal to the driving signal output end under the control of the potential at the third node;

and

in the case that the touch stage is provided after the fourth stage, the touch switching module enables the first node to be electrically disconnected from the second node under the control of the first touch-control signal, the third node is in the floating state, the node control module maintains the voltage difference between the first end of the node control module and the third node to be the voltage difference within the previous time period, and the second output module applies the DC signal to the driving signal output end under the control of the potential at the third node.

16. The gate driver circuit according to claim 11, wherein the shift register further comprises a third output module,

a first end of the third output module is configured to receive a third touch-control signal, a second end of the third output module is configured to receive the DC signal, and a third end of the third output module is connected to the driving signal output end,

wherein the third output module is configured to apply the DC signal to the driving signal output end at the touch stage under the control of the third touch-control signal.

17. The gate driver circuit according to claim 11, wherein

the input module comprises a first switch transistor, a drain electrode of the first switch transistor is connected to the first node;

and

a gate electrode of the first switch transistor is configured to receive the input signal and a source electrode of the first switch transistor is configured to receive the first clock signal, or the gate electrode of the first switch transistor is configured to receive the first clock signal and the source electrode of the first switch transistor is configured to receive the input signal.

18. The gate driver circuit according to claim 11, wherein

the resetting module comprises a second switch transistor, a drain electrode of the second switch transistor is connected to the first node;

and

a gate electrode of the second switch transistor is configured to receive the resetting signal and a source electrode of the second switch transistor is configured to receive the third clock signal, or the gate electrode of the second switch transistor is configured to receive the third clock signal and the source electrode of the second switch transistor is configured to receive the resetting signal.

19. The gate driver circuit according to claim 11, wherein the touch switching module comprises a third switch transistor, a gate electrode of the third switch transistor is configured to receive the first touch-control signal, a source electrode of third switch transistor is connected to the first node, and a drain electrode of third switch transistor is connected to the second node.

20. The gate driver circuit according to claim 11, wherein the node control module comprises a fourth switch transistor, a fifth switch transistor, a sixth switch transistor and a first capacitor;

a gate electrode of the fourth switch transistor is connected to the third node, a source electrode of the fourth switch transistor is configured to receive the DC signal, and a drain electrode of the fourth switch transistor is connected to the first node;

a gate electrode and a source electrode of the fifth switch transistor are configured to receive the fourth clock signal, and a drain electrode of the fifth switch transistor is connected to the third node;

a gate electrode of the sixth switch transistor is connected to the second node, a source electrode of the sixth switch transistor is configured to receive the second touch-control signal, and a drain electrode of the sixth switch transistor is connected to the third node; and

one end of the first capacitor is connected to the third node, and the other end of the first capacitor is configured to receive the DC signal.