OXIDATION RESISTANT BARRIER METAL PROCESS FOR SEMICONDUCTOR DEVICES

• US 20170271269A1
• Filed: 06/07/2017
• Published: 09/21/2017
• Est. Priority Date: 12/18/2015
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: West, Jeffrey A., Udayakumar, Kezhakkedath R., Warninghoff, Eric H., Merriam, Alan G., Faust, Rick A.
• Granted Patent: US 10,008,450 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/31111 by chemical means
• CPC Class Codes: H01L 21/76814 post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/7685 the layer covering a conductive structure H01L21/76849 takes precedence
• CPC Class Codes: H01L 21/76852 the layer also covering the sidewalls of the conductive structure
• CPC Class Codes: H01L 21/76855 After-treatment introducing at least one additional element into the layer
• CPC Class Codes: H01L 21/76861 Post-treatment or after-treatment not introducing additional chemical elements into the layer
• CPC Class Codes: H01L 21/76892 modifying the pattern
• CPC Class Codes: H01L 2224/02166 Collar structures
• CPC Class Codes: H01L 2224/05147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05186 with a principal constituent of the material being a non metallic, non metalloid inorganic material
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 23/5226 Via connections in a multilevel interconnection structure
• CPC Class Codes: H01L 23/528 Geometry or layout of the interconnection structure H01L27/0207 takes precedence; algorithms G06F30/00
• CPC Class Codes: H01L 23/53223 Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 24/00 Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
• CPC Class Codes: H01L 24/03 Manufacturing methods
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/013 : Alloys
• CPC Class Codes: H01L 2924/04941 : TiN
• CPC Class Codes: H01L 2924/04953 : TaN
• CPC Class Codes: H01L 2924/14 : Integrated circuits

Abstract

An integrated circuit and method comprising an underlying metal geometry, a dielectric layer on the underlying metal geometry, a contact opening through the dielectric layer, an overlying metal geometry wherein a portion of the overlying metal geometry fills a portion of the contact opening, and an oxidation resistant barrier layer disposed between the underlying metal geometry and overlying metal geometry. The oxidation resistant barrier layer is formed of TaN or TiN with a nitrogen content of at least 20 atomic % and a thickness of at least 5 nm.

Claims

1. An integrated circuit, comprising:

an underlying metal geometry;

a dielectric layer on the underlying metal geometry;

a contact opening through the dielectric layer wherein the contact opening stops on the underlying metal geometry;

an overlying metal geometry wherein a portion of the overlying metal geometry fills a portion of the contact opening; and

an oxidation resistant barrier layer wherein the oxidation resistant barrier layer is disposed between the underlying metal geometry and overlying metal geometry and wherein the oxidation resistant barrier layer is formed of tantalum-nitride (TaN) or titanium-nitride (TiN) with a nitrogen content of at least 20 atomic % and a thickness of at least 5 nm.

2. The integrated circuit of claim 1, wherein the oxidation resistant barrier layer extends under the contact opening.

3. The integrated circuit of claim 1, wherein the oxidation resistant barrier layer extends along the sides and bottom of the contact opening.

4. The integrated circuit of claim 1, further comprising an interdiffusion barrier layer disposed between the underlying metal geometry and the oxidation resistant barrier layer.

5. The integrated circuit of claim 4, wherein the interdiffusion barrier layer is TaN or TiN with a thickness between 60 nm and 90 nm and a nitrogen content between 0 and 12 atomic percent.

6. The integrated circuit of claim 1, wherein the oxidation resistant barrier layer is formed of TaN with a thickness between 5 and 15 nm and with a nitrogen content between 20 and 35 atomic percent.

7. The integrated circuit of claim 1, wherein the oxidation resistant barrier layer is formed of TaN with a thickness of about 10 nm and a nitrogen content of about 28 atomic percent.

8. An integrated circuit, comprising:

a first metal geometry;

a dielectric layer on the first metal geometry;

a contact opening through the dielectric layer over the first metal geometry;

a second metal geometry wherein a portion of the second metal geometry fills a portion of the contact opening; and

an oxidation resistant barrier layer wherein the oxidation resistant barrier layer is disposed between the first metal geometry and the second metal geometry and wherein the oxidation resistant barrier layer is formed of tantalum-nitride (TaN) or titanium-nitride (TiN) with a nitrogen content of at least 20 atomic % and a thickness of at least 5 nm.

9. The integrated circuit of claim 8, wherein a portion of the oxidation resistant barrier layer is between the dielectric layer and the first metal geometry.

10. The integrated circuit of claim 8, wherein the oxidation resistant barrier layer extends along the sides and bottom of the contact opening.

11. The integrated circuit of claim 8, further comprising an interdiffusion barrier layer disposed between the first metal geometry and the oxidation resistant barrier layer.

12. The integrated circuit of claim 11, wherein the interdiffusion barrier layer is TaN or TiN with a thickness between 60 nm and 90 nm and a nitrogen content between 0 and 12 atomic percent.

13. The integrated circuit of claim 8, wherein the oxidation resistant barrier layer is formed of TaN with a thickness between 5 and 15 nm and with a nitrogen content between 20 and 35 atomic percent.

14. The integrated circuit of claim 8, wherein the oxidation resistant barrier layer is formed of TaN with a thickness of about 10 nm and a nitrogen content of about 28 atomic percent.

15. An integrated circuit, comprising:

a first metal geometry;

a dielectric layer on the first metal geometry;

a contact opening through the dielectric layer over the first metal geometry;

a second metal geometry wherein a portion of the second metal geometry fills a portion of the contact opening;

an oxidation resistant barrier layer wherein the oxidation resistant barrier layer is disposed between the first metal geometry and the second metal geometry and wherein the oxidation resistant barrier layer is formed of tantalum-nitride (TaN) or titanium-nitride (TiN) with a nitrogen content of at least 20 atomic % and a thickness of at least 5 nm; and

an interdiffusion barrier layer disposed between the first metal geometry and the oxidation resistant barrier layer.

16. The integrated circuit of claim 15, wherein a portion of the oxidation resistant barrier layer is between the dielectric layer and the first metal geometry.

17. The integrated circuit of claim 15, wherein the oxidation resistant barrier layer extends along the sides and bottom of the contact opening.

18. The integrated circuit of claim 15, further comprising an interdiffusion barrier layer disposed between the first metal geometry and the oxidation resistant barrier layer.

19. The integrated circuit of claim 18, wherein the interdiffusion barrier layer is TaN or TiN with a thickness between 60 nm and 90 nm and a nitrogen content between 0 and 12 atomic percent.

20. The integrated circuit of claim 15, wherein the oxidation resistant barrier layer is formed of TaN with a thickness between 5 and 15 nm and with a nitrogen content between 20 and 35 atomic percent.