MEMORY DEVICE AND OPERATING METHOD THEREOF
First Claim
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1. A memory device comprising:
- a memory cell array including a plurality of pages;
a peripheral circuit suitable for successively receiving a plurality of logical page data, and performing a program operation with the received logical page data to a selected page; and
a control logic suitable for controlling the peripheral circuit to perform, in parallel, the program operation to the selected page with reception-completed logical page data among the plurality of logical page data while receiving other logical page data.
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Abstract
Provided herein are a memory device and an operating method thereof. The memory device includes: a memory device comprising: a memory cell array including a plurality of pages; a peripheral circuit suitable for successively receiving a plurality of logical page data, and performing a program operation with the received logical page data to a selected page; and a control logic suitable for controlling the peripheral circuit to perform, in parallel, the program operation to the selected page with reception-completed logical page data among the plurality of logical page data while receiving other logical page data.
9 Citations
17 Claims
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1. A memory device comprising:
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a memory cell array including a plurality of pages; a peripheral circuit suitable for successively receiving a plurality of logical page data, and performing a program operation with the received logical page data to a selected page; and a control logic suitable for controlling the peripheral circuit to perform, in parallel, the program operation to the selected page with reception-completed logical page data among the plurality of logical page data while receiving other logical page data. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. An operating method of a memory device comprising:
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receiving first to Nth logical page data; performing a program operation to a selected page with reception-completed one among the first to Nth logical page data; and receiving the other logical page data during the performing of the program operation with the reception-completed logical page data. - View Dependent Claims (12)
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13. An operating method of a memory device comprising:
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receiving least significant bit (LSB) data, central significant bit (CSB) data and most significant bit (MSB) data; performing a program operation to selected page with the LSB data, which is reception-completed; receiving the CSB data and the MSB data during the performing of the program operation with the reception-completed LSB data; and performing the program operation to the selected page with the CSB and MSB data after the performing of the program operation with the reception-completed LSB data and the receiving of the CSB and MSB data. - View Dependent Claims (14, 15, 16, 17)
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Specification