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SMART MAPPING

  • US 20170286495A1
  • Filed: 03/31/2016
  • Published: 10/05/2017
  • Est. Priority Date: 03/31/2016
  • Status: Active Grant
First Claim
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1. A circuit for improving efficiency in a smart mapping system determining an intended recipient of an information request item, comprising:

  • a first matching circuit, comprising;

    a first plurality of XNOR logic gate arrays, wherein each XNOR logic gate array of the first plurality of XNOR logic gate arrays accepting a bit from a first matching source and a bit from a second matching source; and

    a first matching AND logic gate array, accepting outputs from each XNOR logic gate array of the first plurality of XNOR logic gate arrays to produce a first match bit; and

    a second matching circuit, comprising;

    a second plurality of XNOR logic gate arrays, wherein each XNOR logic gate array of the second plurality of XNOR logic gate arrays accepting a bit from a third matching source and a bit from a fourth matching source; and

    a second matching AND logic gate array, accepting outputs from each XNOR logic gate array of the second plurality of XNOR logic gate arrays to produce a second match bit;

    wherein the first matching source includes an information source data element;

    wherein the second matching source includes a plurality of mapping property values for information source candidates;

    wherein the third matching source includes a location associated with a user;

    wherein the fourth matching source includes a location of an information source candidate;

    wherein the system uses the first match bit and the second match bit to determine whether the information source candidate exists for the information source data element; and

    when it is determined that the information source candidate exists for the information source data element, the smart mapping system uses the chain to determine whether the location of the information source candidate is related to the location associated with the user.

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