SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING SEMICONDUCTOR DEVICE

• US 20170288062A1
• Filed: 08/26/2015
• Published: 10/05/2017
• Est. Priority Date: 09/02/2014
• Status: Abandoned Application

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: SAITOH, Takao, KANEKO, Seiji, KANZAKI, Yohsuke, TAKAMARU, Yutaka, IDE, Keisuke, MATSUO, Takuya
• Application Number:
  US15/507,780
• Publication Number:
  US 20170288062A1
• Time in Patent Office: Days
• CPC Class Codes: G02F 1/1362 Active matrix addressed cells G02F1/134336, G02F1/134363 take precedence
• CPC Class Codes: H01L 21/28 Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268 etching for patterning the electrodes H01L21/311, H01L21/3213; multistep manufacturing processes for data storage electrodes H01L29/4011
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/127 with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A semiconductor device includes an oxide semiconductor film, a first insulating film, and a second insulating film. The oxide semiconductor film is made of oxide semiconductor material. The oxide semiconductor film includes a low resistance portion having an electrical resistance lower than another portion. The low resistance portion is separated from the other portion. The first insulating film is formed in an upper layer relative to the oxide semiconductor film. The first insulating film includes a hole at a position overlapping the low resistance portion. The second insulating film is formed in an upper layer relative to the first insulating film. The second insulating film and contains hydrogen.

Claims

1. :

A semiconductor device comprising;

an oxide semiconductor film made of oxide semiconductor material, the oxide semiconductor film including a low resistance portion having an electrical resistance lower than an electrical resistance of another portion, the low resistance portion being separated from the other portion;

a first insulating film formed in an upper layer relative to the oxide semiconductor film, the first insulating film including a hole at a position overlapping the low resistance portion; and

a second insulating film formed in an upper layer relative to the first insulating film, the second insulating film containing hydrogen.

2. :

The semiconductor device according to claim 1, further comprising;

a pixel electrode formed from a transparent electrode film in an upper layer relative to the second insulating film; and

a capacitive trace formed in a lower layer relative to the first insulating film to overlap the pixel electrode, wherein

the oxide semiconductor film is formed such that the capacitive trace is formed from the low resistance portion.

3. :

The semiconductor device according to claim 1, further comprising;

a pixel electrode formed from a transparent electrode film in an upper layer relative to the second insulating film; and

a transistor formed in a lower layer relative to the pixel electrode and connected to the pixel electrode to control application of an electrical potential to the pixel electrode, wherein

the oxide semiconductor film is formed such that a channel included in the transistor is formed from the other portion.

4. :

The semiconductor device according to claim 1, wherein the second insulating film includes a lower second insulating film formed in a lower layer and an upper second insulating film formed in an upper layer.

5. :

A method of producing a semiconductor device, the method comprising;

an oxide semiconductor film forming step for forming an oxide semiconductor film from oxide semiconductor material to separate a portion of the oxide semiconductor film from another portion of the oxide semiconductor film;

a first insulating film forming step for forming a first insulating film in an upper layer relative to the oxide semiconductor film;

a hole forming step for forming a hole in the first insulating film at a position overlapping the portion of the oxide semiconductor film; and

a second insulating film forming step for forming a second insulating film containing hydrogen in an upper layer relative to the first insulating film.

6. :

The method according to claim 5, wherein the second insulating film forming step includes forming the second insulating film at a forming temperature in a range from 220°

C. to 270°

C.

7. :

The method according to claim 5, further comprising an annealing treatment step for performing an annealing treatment at a temperature in a range from 220°

C. to 350°

C. after the second insulating film forming step, wherein

the second insulating film forming step includes forming the second insulating film at a forming temperature in a range from 150°

C. to 220°

C.

8. :

The method according to claim 7, wherein the annealing treatment step includes performing the annealing treatment at a temperature in a range from 270°

C. to 350°

C.

9. :

The method according to claim 5, wherein the second insulating film forming step comprises;

a lower second insulating film forming step for forming a lower second insulating film in a lower layer at a lower forming temperature; and

an upper second insulating film forming step for forming an upper second insulating film in an upper layer at a higher forming temperature.

10. :

The method according to claim 9, wherein

the lower second insulating film forming step includes forming the lower second insulating film at a forming temperature in a range from 150°

C. to 270°

C., and

the upper second insulating film forming step includes forming the upper second insulating film at a forming temperature in a range from 220°

C. to 350°

C.

11. :

The method according to claim 9, wherein a material used for forming the lower second insulating film in the lower second insulating film forming step and a material used for forming the upper second insulating film in the upper second insulating film forming step are the same.