PROGRAMMABLE AMPLIFIER CIRCUIT CAPABLE OF PROVIDING LARGE OR LARGER RESISTANCE FOR FEEDBACK PATH OF ITS AMPLIFIER

• US 20170288617A1
• Filed: 02/16/2017
• Published: 10/05/2017
• Est. Priority Date: 03/30/2016
• Status: Active Grant

• Current Assignee: MediaTek, Inc.
• Original Assignee: MediaTek, Inc.
• Inventors: Lin, Chen-Chien, Wen, Sung-Han, Chang, Yu-Cheng
• Granted Patent: US 10,199,995 B2
• Time in Patent Office: Days
• CPC Class Codes: H03F 2200/504 the supply voltage or current being continuously controlled by a controlling signal, e.g. the controlling signal of a transistor implemented as variable resistor in a supply path for, an IC-block showed amplifier
• CPC Class Codes: H03F 2203/45512 the FBC comprising one or more capacitors, not being switched capacitors, and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45514 the FBC comprising one or more switched capacitors, and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45526 the FBC comprising a resistor-capacitor combination and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45528 the FBC comprising one or more passive resistors and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45594 the IC comprising one or more resistors, which are not biasing resistor
• CPC Class Codes: H03F 3/005 using switched capacitors, e.g. dynamic amplifiers; using switched capacitors as resistors in differential amplifiers H03F3/45 takes precedence
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit
• CPC Class Codes: H03G 1/0094 using switched capacitors
• CPC Class Codes: H03G 3/001 Digital control of analog signals

Abstract

A programmable amplifier circuit includes an amplifier, an input capacitor coupled to an input of the amplifier, a feedback capacitor coupled to the input of the amplifier and an output of the amplifier, and a switched-capacitor resistor circuit. The switched-capacitor resistor circuit is coupled between the input of the amplifier and the output of the amplifier, and configured for simulating a feedback resistor element to provide a resistance for a feedback path of the amplifier by using at least one capacitor placed between the input of the amplifier and the output of the amplifier to avoid leakage current(s) flowing back to an input of the amplifier.

Claims

1. A programmable amplifier circuit, comprising:

an amplifier;

an input capacitor, coupled to an input of the amplifier, for receiving an input signal;

a feedback capacitor, coupled to the input of the amplifier and an output of the amplifier; and

a voltage scaling circuit, coupled between the input of the amplifier and the output of the amplifier, configured for simulating a feedback resistor element to scale down a voltage amplitude of a signal generated from the output of the amplifier to generate a feedback signal to the input of the amplifier.

2. The programmable amplifier circuit of claim 1, wherein the voltage scaling circuit comprises:

a first impedance unit, coupled to the output of the amplifier; and

a second impedance unit, coupled between the first impedance unit and a reference level;

wherein an intermediate node between the first impedance unit and the second impedance unit is coupled to the feedback signal to be generated to the input of the amplifier.

3. A programmable amplifier circuit, comprising:

an amplifier;

an input capacitor, coupled to an input of the amplifier, for receiving an input signal;

a feedback capacitor, coupled to the input of the amplifier and an output of the amplifier; and

a switched-capacitor resistor circuit, coupled between the input of the amplifier and the output of the amplifier, configured for simulating a feedback resistor element to provide a resistance for a feedback path of the amplifier by using at least one capacitor placed between the input of the amplifier and the output of the amplifier to avoid leakage current(s) flowing back to an input of the amplifier.

4. The programmable amplifier circuit of claim 3, wherein the switched-capacitor resistor circuit comprises:

a storage block, couple to the input of the amplifier, for using a first capacitor placed between the input of the amplifier and the output of the amplifier to avoid leakage current(s) flowing the feedback path; and

an inverting circuit, coupled to one end of the storage block, for inverting a signal generated from the output of the amplifier to generate a feedback signal to the storage block, or for inverting a signal generated from the storage block to generate a signal to the input of the amplifier.

5. The programmable amplifier circuit of claim 4, wherein the storage block comprises:

the first capacitor;

a first switch, selectively coupled between the input of the amplifier and a first end of the first capacitor;

a second switch, selectively coupled between a reference level and a second end of the first capacitor;

a third switch, selectively coupled between the reference level and the first end of the first capacitor; and

a fourth switch, selectively coupled between the second end of the first capacitor and one end of the storage block.

6. The programmable amplifier circuit of claim 5, wherein the first switch and the second switch are turned on when the third switch and the fourth switch are turned off, and the first switch and the second switch are turned off when the third switch and the fourth switch are turned on.

7. The programmable amplifier circuit of claim 6, wherein when a clock frequency signal is at a rising edge, the first switch and the second switch are turned on, and the third switch and the fourth switch are turned off;

and, when the clock frequency signal is at a falling edge, the first switch and the second switch are turned off, and the third switch and the fourth switch are turned on.

8. The programmable amplifier circuit of claim 3, wherein the switched-capacitor resistor circuit comprises:

a plurality of storage blocks, couple between the input of the amplifier and the output of the amplifier, for respectively using a plurality of capacitors placed between the input of the amplifier and the output of the amplifier to the avoid leakage current(s);

wherein the plurality of storage blocks are connected in a cascaded structure.

9. The programmable amplifier circuit of claim 8, wherein the plurality of storage blocks comprise:

a first storage block, couple to the input of the amplifier, for using a first capacitor placed between the input of the amplifier and the output of the amplifier to avoid leakage current(s) flowing the feedback path; and

a second storage block, couple between the first storage block and the output of the amplifier, for using a second capacitor placed between the input of the amplifier and the output of the amplifier to avoid leakage current (s) flowing the feedback path;

wherein the first storage block is connected to the second storage block in a cascaded structure.

10. The programmable amplifier circuit of claim 8, wherein each storage block further comprises:

a first switch, selectively coupled to a first end;

a second switch, selectively coupled between a reference level and a second end;

a third switch, selectively coupled between the reference level and the first end; and

a fourth switch, selectively coupled to the second end;

wherein the first end and the second end are two ends of one capacitor used by said each storage block.

11. The programmable amplifier circuit of claim 3, further comprising:

a voltage scaling circuit, coupled between the switched-capacitor resistor circuit and the input of the amplifier, configured for simulating a feedback resistor element to scale down a voltage amplitude of a signal generated from the output of the amplifier to generate a feedback signal to the switched-capacitor resistor circuit.

12. A programmable amplifier circuit, comprising:

a differential amplifier;

a first input capacitor, coupled to a positive input of the differential amplifier, for receiving a first input signal;

a second input capacitor, coupled to a negative input of the differential amplifier, for receiving a second input signal;

a first feedback capacitor, coupled to the positive input of the differential amplifier and a negative output of the differential amplifier;

a second feedback capacitor, coupled to the negative input of the differential amplifier and a positive output of the differential amplifier;

a first switched-capacitor resistor circuit, coupled between the positive input of the differential amplifier and the negative output of the differential amplifier, configured for simulating a first feedback resistor element to provide a resistance for a first feedback path of the differential amplifier by using at least one capacitor placed between the positive input of the amplifier and the negative output of the amplifier to avoid leakage current(s) flowing back an input of the differential amplifier; and

a second switched-capacitor resistor circuit, coupled between the negative input of the differential amplifier and the positive output of the differential amplifier, configured for simulating a second feedback resistor element to provide a resistance for a second feedback path of the differential amplifier by using at least one capacitor placed between the negative input of the amplifier and the positive output of the amplifier to avoid leakage current (s) flowing back to another input of the differential amplifier.

13. The programmable amplifier circuit of claim 12, wherein each switched-capacitor resistor circuit comprises:

a storage block, for using a specific capacitor to avoid leakage current(s) flowing the first feedback path or the second feedback path; and

an inverting circuit, coupled to one end of the storage block, for inverting a signal generated from an output of the differential amplifier to generate a feedback signal to the storage block, or for inverting a signal generated from the storage block to generate a signal to an input of the differential amplifier.

14. The programmable amplifier circuit of claim 13, wherein the storage block comprises:

the specific capacitor;

a first switch, selectively coupled to a first end of the specific capacitor;

a second switch, selectively coupled between a first reference level and a second end of the specific capacitor;

a third switch, selectively coupled between a second reference level and the first end of the specific capacitor; and

a fourth switch, selectively coupled to the second end of the specific capacitor.

15. The programmable amplifier circuit of claim 14, wherein the first switch and the second switch are turned on when the third switch and the fourth switch are turned off, and the first switch and the second switch are turned off when the third switch and the fourth switch are turned on.

16. The programmable amplifier circuit of claim 15, wherein when a clock frequency signal is at a rising edge, the first switch and the second switch are turned on, and the third switch and the fourth switch are turned off;

and, when the clock frequency signal is at a falling edge, the first switch and the second switch are turned off, and the third switch and the fourth switch are turned on.

17. The programmable amplifier circuit of claim 12, wherein each storage block comprises:

a first storage block, couple to one among the positive input and the negative input of the differential amplifier, for using a first capacitor to avoid leakage current (s) flowing the first feedback path or the second feedback path; and

a second storage block, couple between the first storage block and one among the positive output and the negative output of the differential amplifier, for using a second capacitor to avoid leakage current(s) flowing the first feedback path or the second feedback path;

wherein the first storage block is connected to the second storage block in a cascaded structure.

18. The programmable amplifier circuit of claim 17, wherein each storage block further comprises:

a first switch, selectively coupled to one input of the differential amplifier and a first end;

a second switch, selectively coupled between a first reference level and a second end;

a third switch, selectively coupled between a second reference level and the first end; and

a fourth switch, selectively coupled to the second end;

wherein the first end and the second end are two ends of the first capacitor for the first storage block or two ends of the second capacitor for the second storage block.

19. The programmable amplifier circuit of claim 12, further comprising:

a voltage scaling circuit, coupled between the first switched-capacitor resistor circuit, the second switched-capacitor resistor circuit, and the positive output and the negative output of the differential amplifier, configured for simulating two feedback resistor elements to scale down a voltage amplitude of a signal generated from the negative output of the differential amplifier to generate a first feedback signal to the first switched-capacitor resistor circuit and to scale down a voltage amplitude of a signal generated from the positive output of the differential amplifier to generate a second feedback signal to the second switched-capacitor resistor circuit.

20. A programmable amplifier circuit, comprising:

a differential amplifier;

a first input capacitor, coupled to a positive input of the differential amplifier, for receiving a first input signal;

a second input capacitor, coupled to a negative input of the differential amplifier, for receiving a second input signal;

a first feedback capacitor, coupled to the positive input of the differential amplifier and a negative output of the differential amplifier;

a second feedback capacitor, coupled to the negative input of the differential amplifier and a positive output of the differential amplifier;

a first switched-capacitor resistor circuit, coupled between the negative input of the differential amplifier and the negative output of the differential amplifier, configured for simulating a first feedback resistor element to provide a resistance for a first feedback path of the differential amplifier by using at least one capacitor placed between the positive input of the differential amplifier and the negative output of the differential amplifier to avoid leakage current(s) flowing back to an input of the differential amplifier; and

a second switched-capacitor resistor circuit, coupled between the positive input of the differential amplifier and the positive output of the differential amplifier, configured for simulating a second feedback resistor element to provide a resistance for a second feedback path of the differential amplifier by using at least one capacitor placed between the negative input of the differential amplifier and the positive output of the differential amplifier to avoid leakage current(s) flowing back to another input of the differential amplifier.

21. The programmable amplifier circuit of claim 20, wherein each switched-capacitor resistor circuit comprises:

a single storage block, for using a specific capacitor to avoid the leakage current(s).