DYNAMICALLY CONTROLLING ERASURE CODE DISTRIBUTION IN AN OBJECT STORE
First Claim
1. An apparatus, comprising:
- a processor;
a memory;
a set of logics that control the location of an erasure code in an erasure code based object store, where the object store includes a plurality of storage apparatus; and
an interface that connects the processor, the memory, and the set of logics;
the set of logics comprising;
a first logic that controls the location of the erasure code in the object store based on processing loads experienced by two or more members of the plurality of storage apparatus;
a second logic that controls the location of the erasure code in the object store based on storage capacities present in two or more members of the plurality of storage apparatus; and
a third logic that controls the location of the erasure code in the object store based on usage patterns experienced by two or more members of the plurality of storage apparatus and a fault tolerance measure associated with the object store.
7 Assignments
0 Petitions
Accused Products
Abstract
Example apparatus and methods monitor conditions in an object storage system. The conditions monitored may include a load balance measure in the system, a capacity balance measure in the system, a fault tolerance measure in the system, or a usage pattern measure in the system. A distribution plan or redistribution plan for storing or moving erasure codes in the object storage system may be determined based on the conditions. The distribution plan or the redistribution plan for the erasure codes may be updated dynamically in response to changing conditions in the object storage system. The distribution or redistribution may depend on a weighted combination of the load balance measure, the capacity balance measure, the fault tolerance measure, or the usage pattern measure so that responding to one sub-optimal condition (e.g., load imbalance) does not create a different sub-optimal condition (e.g., unacceptable fault tolerance).
8 Citations
20 Claims
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1. An apparatus, comprising:
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a processor; a memory; a set of logics that control the location of an erasure code in an erasure code based object store, where the object store includes a plurality of storage apparatus; and an interface that connects the processor, the memory, and the set of logics; the set of logics comprising; a first logic that controls the location of the erasure code in the object store based on processing loads experienced by two or more members of the plurality of storage apparatus; a second logic that controls the location of the erasure code in the object store based on storage capacities present in two or more members of the plurality of storage apparatus; and a third logic that controls the location of the erasure code in the object store based on usage patterns experienced by two or more members of the plurality of storage apparatus and a fault tolerance measure associated with the object store. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A system, comprising:
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means for identifying where to store erasure codes in an object store based on a processing load and at least one of a storage capacity, a fault tolerance, or a usage pattern associated with an apparatus in the object store at a first time; and means for identifying where to relocate erasure codes in the object store based on a processing load, a storage capacity, a fault tolerance level, or a usage pattern associated with an apparatus in the object store at a second, later time, where erasure codes are relocated based on a random approach redistribution plan, or a round-robin approach redistribution plan, where the means for identifying where to store erasure codes is configured to optimize a weighted value computed from the processing load, the storage capacity, the fault tolerance, or the usage pattern at a time when an erasure code is stored in the object store, and where the means for identifying where to relocate erasure codes is configured to optimize a weighted value computed from the processing load, the storage capacity, the fault tolerance, or the usage pattern at a time after the erasure code is stored in the object store.
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8. An apparatus that dynamically controls erasure code distribution in an object store, the apparatus comprising:
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a processor; a memory; a set of circuits that control the location of an erasure code in an erasure code based object store, where the object store includes two or more devices on which an erasure code can be stored; and an interface that connects the processor, the memory, and the set of circuits; the set of circuits comprising; a first circuit that accesses a first data concerning an operating condition associated with the object store, and that recognizes an association between a plurality of objects associated with an erasure code to be stored in the object store; a second circuit that identifies a usage pattern associated with the plurality of objects, where the usage pattern is based, at least in part, on the association, where the usage pattern concerns a relationship between an ingest site and an accessing site, and a relationship between the plurality of objects or erasure codes to be stored in the object store; a third circuit that generates a prediction of where, in the object store, a read operation will be performed on the plurality of objects, based, at least in part, on the usage pattern; and a fourth circuit that creates a distribution plan to control distribution of erasure codes to members of the two or more devices when the erasure codes are stored in the object store, where the distribution plan is based, at least in part, on the first data and the prediction. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification