PIXEL AND A DISPLAY DEVICE INCLUDING THE PIXEL

• US 20170309230A1
• Filed: 02/21/2017
• Published: 10/26/2017
• Est. Priority Date: 04/25/2016
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: KWON, TAE-HOON, LEE, SEUNG-KYU, CHA, SEUNG-JI
• Granted Patent: US 10,373,565 B2
• Time in Patent Office: Days
• CPC Class Codes: G09G 2300/0443 with several sub-pixels for the same colour in a pixel, not specifically used to display gradations G09G3/364 takes precedence
• CPC Class Codes: G09G 2300/0452 Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
• CPC Class Codes: G09G 2300/0814 used for selection purposes, e.g. logical AND for partial update
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2310/0297 Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 3/2092 Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3275 Details of drivers for data electrodes

Abstract

A display device includes a display panel including a plurality of scan lines, a plurality of data lines, and a plurality of unit pixels. Each unit pixel includes a plurality of sub-pixels, each coupled to a respective data line. The plurality of sub-pixels includes a red sub-pixel, a first green sub-pixel, a blue sub-pixel, and a second green sub-pixel. The display device further includes a data driver configured to output data signals via output channels. The display device additionally includes a plurality of demultiplexers configured to selectively connect data signals output from the output channels to the plurality of sub-pixels in response to a plurality of select signals that are sequentially provided to the plurality of demultiplexers. The display device further includes a scan driver configured to provide scan signals to the unit pixels through the scan lines, and a timing controller.

Claims

1. A display device comprising:

a display panel including a plurality of scan lines, a plurality of data lines, and a plurality of unit pixels, wherein each unit pixel includes a plurality of sub-pixels, each coupled to a respective data line, the plurality of sub-pixels includes a red sub-pixel, a first green sub-pixel, a blue sub-pixel, and a second green sub-pixel;

a data driver configured to output data signals via output channels;

a plurality of demultiplexers configured to selectively connect data signals output from the output channels to the plurality of sub-pixels in response to a plurality of select signals that are sequentially provided to the plurality of demultiplexers;

a scan driver configured to provide scan signals to the unit pixels through the scan lines; and

a timing controller configured to control the demultiplexers, the data driver, and the scan driver.

2. The display device of claim 1, wherein an Nth demultiplexer is coupled to an Nth output channel, wherein N is an integer equal to or greater than 1.

3. The display device of claim 2, wherein an Nth demultiplexer is coupled to the red sub-pixel of a Kth unit pixel, the first green sub-pixel of the Kth unit pixel, the blue sub-pixel of the Kth unit pixel, the second green sub-pixel of the Kth unit pixel, the red sub-pixel of a (K+1)th unit pixel, and the first green sub-pixel of the (K+1)th unit pixel, and

wherein an (N+1)th demultiplexer is coupled to the blue sub-pixel of the (K+1)th unit pixel, the second green sub-pixel of the (K+1)th unit pixel, the red sub-pixel of a (K+2)th unit pixel, the first green sub-pixel of the (K+2)th unit pixel, the blue sub-pixel of the (K+2)th unit pixel, and the second green sub-pixel of the (K+2)th unit pixel, wherein K is an integer equal to or greater than 1.

4. The display device of claim 3, wherein the Nth demultiplexer includes:

a first select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the red sub-pixel of the Kth unit pixel, in response to a first select signal;

a second select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the first green sub-pixel of the Kth unit pixel, in response to a second select signal;

a third select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the red sub-pixel of the (K+1)th unit pixel, in response to a third select signal;

a fourth select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the first green sub-pixel of the (K+1)th unit pixel, in response to a fourth select signal;

a fifth select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the blue sub-pixel of the Kth unit pixel, in response to a fifth select signal; and

a sixth select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the second green sub-pixel of the Kth unit pixel, in response to a sixth select signal.

5. The display device of claim 4, wherein the (N+1)th demultiplexer includes:

a seventh select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the red sub-pixel of the (K+2)th unit pixel, in response to the first select signal;

an eighth select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the first green sub-pixel of the (K+2)th unit pixel, in response to the second select signal;

a ninth select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the blue sub-pixel of the (K+2)th unit pixel, in response to the third select signal;

a tenth select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the second green sub-pixel of the (K+2)th unit pixel, in response to the fourth select signal;

an eleventh select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the blue sub-pixel of the (K+1)th unit pixel, in response to the fifth select signal; and

a twelfth select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the second green sub-pixel of the (K+1)th unit pixel, in response to the sixth select signal.

6. The display device of claim 3, wherein the Nth demultiplexer includes:

a first select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the red sub-pixel of the Kth unit pixel, in response to a first select signal;

a second select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the blue sub-pixel of the Kth unit pixel, in response to a second select signal;

a third select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the red sub-pixel of the (K+1)th unit pixel, in response to a third select signal;

a fourth select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the first green sub-pixel of the Kth unit pixel, in response to a fourth select signal;

a fifth select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the second green sub-pixel of the Kth unit pixel, in response to a fifth select signal; and

a sixth select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the first green sub-pixel of the (K+11)th unit pixel, in response to a sixth select signal.

7. The display device of claim 6, wherein the (N+1)th demultiplexer includes:

a seventh select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the blue sub-pixel of the (K+1)th unit pixel, in response to the first select signal;

an eighth select switching transistor configured to couple the (N+)th output channel and the data line, which is coupled to the red sub-pixel of the (K+2)th unit pixel, in response to the second select signal;

a ninth select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the blue sub-pixel of the (K+2)th unit pixel, in response to the third select signal;

a tenth select switching transistor configured to couple th (N+1)th output channel and the data line, which is coupled to the second green sub-pixel of the (K+1)th unit pixel, in response to the fourth select signal;

an eleventh select switching transistor configured to couple th (N+1)th output channel and the data line, which is coupled to the first green sub-pixel of the (K+2)th unit pixel, in response to the fifth select signal; and

a twelfth select switching transistor configured to couple th (N+1)th output channel and the data line, which is coupled to the second green sub-pixel of the (K+2)th unit pixel, in response to the sixth select signal.

8. The display device of claim 1, wherein the demultiplexers allows an amount of coupling that affects the data lines coupled to the red sub-pixels to be substantially the same, an amount of coupling that affects the data lines coupled to the first green sub-pixels to be substantially the same, an amount of coupling that affects the data lines coupled to the blue sub-pixels to be substantially the same, and an amount of coupling that affects the data lines coupled to the second green sub-pixels to be substantially the same.

9. The display device of claim 1, wherein the timing controller generates first through sixth select signals, and sequentially provides the first through sixth select signals to the demultiplexers.

10. The display device of claim 9, wherein the timing controller provides the first through sixth select signals to the demultiplexers during a data input period of the unit pixels.

11. An electronic device includes a display device and a processor that controls the display device, wherein the display device comprises:

a display panel including a plurality of scan lines, a plurality of data lines, and a plurality of unit pixels, wherein each unit pixel includes, in sequence, a red sub-pixel, a first green sub-pixel, a blue sub-pixel, and a second green sub-pixel, each sub-pixel being coupled to a respective data line;

a data driver configured to output data signals via output channels;

a plurality of demultiplexers configured to selectively connect data signals output from the output channels to the plurality of sub-pixels, wherein a first demultiplexer is connected to a first unit pixel and a first half portion of a second unit pixel, and a second demultiplexer is connected to a second half portion of the second unit pixel and a third unit pixel;

a scan driver configured to provide a scan signal to the unit pixels through the scan lines; and

a timing controller configured to control the demultiplexers, the data driver, and the scan driver.

12. The electronic device of claim 11, wherein an Nth demultiplexer is coupled to an Nth output channel, wherein N is an integer equal to or greater than 1.

13. The electronic device of claim 12, wherein an Nth demultiplexer is coupled to the red sub-pixel of a Kth unit pixel, the first green sub-pixel of the Kth unit pixel, the blue sub-pixel of the Kth unit pixel, the second green sub-pixel of the Kth unit pixel, the red sub-pixel of a (K+1)th unit pixel, and the first green sub-pixel of the (K+1)th unit pixel, wherein K is an integer equal to or greater than 1, and

wherein an (N+1)th demultiplexer is coupled to the blue sub-pixel of the (K+1)th unit pixel, the second green sub-pixel of the (K+1)th unit pixel, the red sub-pixel of a (K+2)th unit pixel, the first green sub-pixel of the (K+2)th unit pixel, the blue sub-pixel of the (K+2)th unit pixel, and the second green sub-pixel of the (K+2)th unit pixel.

14. The electronic device of claim 13, wherein the Nth demultiplexer includes:

a first select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the red sub-pixel of the Kth unit pixel, in response to a first select signal;

a second select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the first green sub-pixel of the Kth unit pixel, in response to a second select signal;

a third select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the red sub-pixel of the (K+1)th unit pixel, in response to a third select signal;

a fourth select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the first green sub-pixel of the (K+1)th unit pixel, in response to a fourth select signal;

a fifth select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the blue sub-pixel of the Kth unit pixel, in response to a fifth select signal; and

a sixth select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the second green sub-pixel of the Kth unit pixel, in response to a sixth select signal.

15. The electronic device of claim 14, wherein the (N+1)th demultiplexer includes:

a seventh select switching transistor configured to couple an (N+1)th output channel and the data line, which is coupled to the red sub-pixel of the (K+2)th unit pixel, in response to the first select signal;

an eighth select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the first green sub-pixel of the (K+2)th unit pixel, in response to the second select signal;

a ninth select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the blue sub-pixel of the (K+2)th unit pixel, in response to the third select signal;

a tenth select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the second green sub-pixel of the (K+2)th unit pixel, in response to the fourth select signal;

an eleventh select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the blue sub-pixel of the (K+1)th unit pixel, in response to the fifth select signal; and

a twelfth select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the second green sub-pixel of the (K+1)th unit pixel, in response to the sixth select signal.

16. The electronic device of claim 13, wherein the Nth demultiplexer includes:

a first select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the red sub-pixel of the Kth unit pixel, in response to a first select signal;

a second select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the blue sub-pixel of the Kth unit pixel, in response to a second select signal;

a third select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the red sub-pixel of the (K+1)th unit pixel, in response to a third select signal;

a fourth select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the first green sub-pixel of the Kth unit pixel, in response to a fourth select signal;

a fifth select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the second green sub-pixel of the Kth unit pixel, in response to a fifth select signal; and

a sixth select switching transistor configured to couple the Nth output channel and the data line, which is coupled to the first green sub-pixel of the (K+1)th unit pixel, in response to a sixth select signal.

17. The electronic device of claim 16, wherein the (N+1)th demultiplexer includes:

a seventh select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the blue sub-pixel of the (K+1)th unit pixel, in response to the first select signal;

an eighth select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the red sub-pixel of the (K+2)th unit pixel, in response to the second select signal;

a ninth select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the blue sub-pixel of the (K+2)th unit pixel, in response to the third select signal;

a tenth select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the second green sub-pixel of the (K+1)th unit pixel, in response to the fourth select signal;

an eleventh select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the first green sub-pixel of the (K+2)th unit pixel, in response to the fifth select signal; and

a twelfth select switching transistor configured to couple the (N+1)th output channel and the data line, which is coupled to the second green sub-pixel of the (K+2)th unit pixel, in response to the sixth select signal.

18. The electronic device of claim 11, wherein the demultiplexers allows an amount of coupling that affects the data lines coupled to the red sub-pixels to be substantially the same, an amount of coupling that affects the data lines coupled to the first green sub-pixels to be substantially the same, an amount of coupling that affects the data lines coupled to the blue sub-pixels to be substantially the same, and an amount of coupling that affects the data lines coupled to the second green sub-pixels to be substantially the same.

19. The electronic device of claim 11, wherein the timing controller generates first through sixth select signals, and sequentially provides the first through sixth select signals to the demultiplexers.

20. The electronic device of claim 19, wherein the timing controller provides the first through sixth select signals to the demultiplexers during a data input period of the unit pixels.