INTEGRATED CIRCUITS WITH MAGNETIC TUNNEL JUNCTIONS AND METHODS FOR PRODUCING THE SAME

• US 20170309813A1
• Filed: 02/27/2017
• Published: 10/26/2017
• Est. Priority Date: 04/26/2016
• Status: Abandoned Application

• Current Assignee: Globalfoundries Singapore Pte Limited (GlobalFoundries, Inc.)
• Original Assignee: Globalfoundries Singapore Pte Limited (GlobalFoundries, Inc.)
• Inventors: Naik, Vinayak Bharat, Yamane, Kazutaka, Lee, Kangho
• Application Number:
  US15/443,741
• Publication Number:
  US 20170309813A1
• Time in Patent Office: Days
• CPC Class Codes: H01F 10/145 containing Al, e.g. SENDUST
• CPC Class Codes: H01F 10/16 containing cobalt H01F10/126 , H01F10/13 take precedence
• CPC Class Codes: H01F 10/3213 Exchange coupling of magnetic semiconductor multilayers, e.g. MnSe/ZnSe superlattices semiconductor materials for use in semiconductor devices H01L29/12
• CPC Class Codes: H01F 41/32 for applying conductive, insulating or magnetic material on a magnetic film , specially adapted for a thin magnetic film
• CPC Class Codes: H10B 61/22 of the field-effect transistor [FET] type
• CPC Class Codes: H10N 50/10 Magnetoresistive devices
• CPC Class Codes: H10N 50/85 Magnetic active materials

Abstract

Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, an integrated circuit includes a fixed layer that is magnetic and a tunnel barrier layer overlying the fixed layer, where the tunnel barrier layer is non-magnetic. A total free layer overlies the tunnel barrier layer, where the total free layer includes a plurality of individual free layers, wherein each of the plurality of individual free layers includes one or more of cobalt, iron, or boron, and where each of the plurality of individual free layers is magnetic. At least one of the plurality of individual free layers includes an atomic ratio of cobalt to iron that is from about 0.9/1 to about 1.1/1.

Claims

1. An integrated circuit comprising:

a fixed layer that is magnetic;

a tunnel barrier layer overlying the fixed layer, wherein the tunnel barrier layer is non-magnetic;

a total free layer overlying the tunnel barrier layer, wherein the total free layer comprises a plurality of individual free layers, wherein each of the plurality of individual free layers includes one or more of cobalt, iron, or boron, wherein each of the plurality of individual free layers is magnetic, and wherein at least one of the plurality of individual free layers comprises an atomic ratio of cobalt to iron that is from about 0.9/1 to about 1.1/1.

2. The integrated circuit of claim 1 wherein the at least one of the plurality of individual free layers comprise the atomic ratio of cobalt to iron that is from about 0.01/1 to about 0.7/1

3. The integrated circuit of claim 1 wherein the plurality of individual free layers comprise a first free layer and a second free layer;

and

wherein the total free layer comprises a first spacer layer that is non-magnetic, wherein the first spacer layer is between the first free layer and the second free layer.

4. The integrated circuit of claim 3 wherein the plurality of individual free layers comprise:

a third free layer overlying the second free; and

wherein the total free layer comprises a second spacer layer between the third free layer and the second free layer, wherein the second spacer layer is non-magnetic.

5. The integrated circuit of claim 4 wherein the plurality of individual free layers comprise:

a fourth free layer overlying the third free; and

wherein the total free layer comprises a third spacer layer between the fourth free layer and the third free layer, wherein the third spacer layer is non-magnetic.

6. The integrated circuit of claim 1 wherein the fixed layer comprises:

a first hard metal layer that is magnetic;

a second hard metal layer that is magnetic; and

a fixed divider layer between the first hard metal layer and the second hard metal layer wherein the fixed divider layer is non-magnetic.

7. The integrated circuit of claim 6 wherein the fixed divider layer comprises one or more of ruthenium, iridium, rhodium, chromium, or nickel.

8. The integrated circuit of claim 1 wherein at least one of the plurality of individual free layers comprises a tempco element, wherein the tempco element is at least one of samarium, dysprosium, copper, molybdenum, tungsten, and zirconium.

9. The integrated circuit of claim 8 wherein the tempco element is present in the at least one of the plurality of individual free layers at from about 10 to about 100 atomic percent.

10. The integrated circuit of claim 8 wherein at least one of the plurality of individual free layers has a temperature coefficient that is positive within a temperature range of from about 40 degrees Celsius to about 260 degrees Celsius.

11. The integrated circuit of claim 1 wherein the total free layer has a formation energy of about 40 k_bT or greater at a temperature of about 260 degrees Celsius.

12. An integrated circuit comprising:

a fixed layer that is magnetic;

a tunnel barrier layer overlying the fixed layer, wherein the tunnel barrier layer is non-magnetic;

a total free layer overlying the tunnel barrier layer, wherein the total free layer comprises a plurality of individual free layers wherein each of the plurality of individual free layers are magnetic, wherein at least one of the plurality of individual free layers comprise a tempco element, wherein the tempco element is at least one of samarium, dysprosium, copper, molybdenum, tungsten, and zirconium.

13. The integrated circuit of claim 12 wherein the tempco element is present in the at least one of the plurality of individual free layers at a concentration of from about 10 to about 100 atomic percent.

14. The integrated circuit of claim 12 wherein the at least one of the plurality of individual free layers that comprises the tempco element has a positive temperature coefficient within a temperature range of from about 40 degrees Celsius and about 260 degrees Celsius.

15. The integrated circuit of claim 12 wherein the plurality of individual free layers comprise:

a first free layer and a second free layer; and

wherein the total free layer comprises a first spacer layer between the first free layer and the second free layer, wherein the first spacer layer is non-magnetic.

16. The integrated circuit of claim 15 wherein the plurality of individual free layers comprises:

a third free layer overlying the second free layer; and

wherein the total free layer comprises a second spacer layer between the third free layer and the second free layer, wherein the second spacer layer is non-magnetic.

17. The integrated circuit of claim 12 wherein the total free layer has an energy barrier of about 40 k_bT or greater at a temperature of about 260 degrees Celsius.

18. The integrated circuit of claim 12 wherein at least one of the plurality of individual free layers has a cobalt to iron ratio of from about 0.9/1 to about 1.1/1.

19. The integrated circuit of claim 12 wherein the at least one of the plurality of individual free layers that comprises the tempco element comprise a combination of samarium and a transition metal (TM) in the form of Sm₂TM₁₇.

20. A method of forming an integrated circuit comprising:

forming a fixed layer that is magnetic;

forming a tunnel barrier layer overlying the fixed layer, wherein the tunnel barrier layer is non-magnetic; and

forming a total free layer overlying the tunnel barrier layer, wherein the total free layer comprises a first free layer that is magnetic, a second free layer that is magnetic, and a first spacer layer between the first free layer and the second free layer wherein the first spacer layer in non-magnetic, wherein the first free layer has a first free layer temperature coefficient, the second free layer has a second free layer temperature coefficient that is different than the first free layer temperature coefficient, and the total free layer has a total free layer temperature coefficient that is between the first free layer temperature coefficient and the second free layer temperature coefficient.