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Method for Reading an EEPROM and Corresponding Device

  • US 20170323684A1
  • Filed: 07/26/2017
  • Published: 11/09/2017
  • Est. Priority Date: 11/03/2015
  • Status: Active Grant
First Claim
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1. A memory device comprising a read amplifier, the read amplifier comprising:

  • a first current generator and a second current generator;

    a first inverter having an input coupled to an output of the second current generator;

    a first transistor having a gate node coupled to an input node of the read amplifier, a drain node coupled to an output of the first current generator, and a source node coupled to a reference ground;

    a second transistor having a gate node coupled to the output of the first current generator, a drain node coupled to a reference voltage, and a source node coupled to the gate node of the first transistor;

    a third transistor having a drain node coupled to the output of the first current generator and a source node coupled to the reference ground;

    a fourth transistor having a gate node coupled to the output of the first current generator, a drain node coupled to the output of the second current generator, and a source node coupled to the reference ground; and

    a fifth transistor having a drain node coupled to the output of the second current generator and a source node coupled to the reference voltage.

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