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THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF

  • US 20170323904A1
  • Filed: 02/16/2017
  • Published: 11/09/2017
  • Est. Priority Date: 05/03/2016
  • Status: Active Grant
First Claim
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1. A thin film transistor array panel comprising:

  • a substrate;

    a thin film transistor disposed on a surface of the substrate and including a semiconductor, a source electrode, and a drain electrode that are disposed on a same layer as one another, wherein the semiconductor is between the source electrode and the drain electrode; and

    a buffer layer disposed between the semiconductor and the substrate and including an inorganic insulating material,wherein a first edge of the buffer layer is substantially parallel to an adjacent edge of the semiconductor, a second edge of the buffer layer is substantially parallel to an adjacent edge of the source electrode, and a third edge of the buffer layer is substantially parallel to an adjacent edge of the drain electrode.

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