DETERMINING A CELL STATE OF A RESISTIVE MEMORY CELL
First Claim
1. A device for determining an actual cell state of a resistive memory cell having a plurality M of programmable cell states, the device comprising:
- a sensing circuit configured to sense a sensing voltage of the resistive memory cell and to output a resultant value in response to the sensing voltage which is indicative for the actual cell state,a settling circuit, including a plurality of current mirrors, configured to settle the sensing voltage to a certain target voltage representing one of the M programmable cell states,a prebiasing circuit configured to pre-bias a bitline capacitance of the resistive memory cell such that the sensing voltage is close to the certain target voltage, anda resistance circuit including a plurality of resistors connected in series and coupled in parallel to the resistive memory cell, wherein the resistance circuit is configured to reduce an effective resistance seen by the prebiasing circuit,wherein the settling circuit and the resistance circuit are configured to form a plurality of current-resistor pairs being switchable to define a linear range of detection currents corresponding to the certain target voltages, each of the plurality of current-resistor pairs including one current mirror and one resistor.
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Abstract
A sensing circuit senses a sensing voltage of a resistive memory cell and outputs a resultant value in response to the sensing voltage which is indicative for the actual cell state. A settling circuit includes a plurality of current mirrors for settling the sensing voltage to a certain target voltage representing one of M programmable cell states. A prebiasing circuit is provided for prebiasing a bitline capacitance of the resistive memory cell such that the sensing voltage is close to the certain target voltage. A resistance circuit includes a plurality of resistors connected in series and coupled in parallel to the resistive memory cell. The resistance circuit is configured to reduce an effective resistance seen by the prebiasing circuit. The settling circuit and the resistance circuit are configured to form a plurality of current-resistor pairs switchable to define a linear range detection currents corresponding to the certain target voltages.
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Citations
18 Claims
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1. A device for determining an actual cell state of a resistive memory cell having a plurality M of programmable cell states, the device comprising:
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a sensing circuit configured to sense a sensing voltage of the resistive memory cell and to output a resultant value in response to the sensing voltage which is indicative for the actual cell state, a settling circuit, including a plurality of current mirrors, configured to settle the sensing voltage to a certain target voltage representing one of the M programmable cell states, a prebiasing circuit configured to pre-bias a bitline capacitance of the resistive memory cell such that the sensing voltage is close to the certain target voltage, and a resistance circuit including a plurality of resistors connected in series and coupled in parallel to the resistive memory cell, wherein the resistance circuit is configured to reduce an effective resistance seen by the prebiasing circuit, wherein the settling circuit and the resistance circuit are configured to form a plurality of current-resistor pairs being switchable to define a linear range of detection currents corresponding to the certain target voltages, each of the plurality of current-resistor pairs including one current mirror and one resistor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A resistive memory device, comprising:
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a memory including a plurality of resistive memory cells having a plurality M of programmable levels, and a read/write apparatus configured to read and write data in the resistive memory cells, wherein the read/write apparatus includes a device for determining an actual cell state of a resistive memory cell having a plurality M of programmable cell states, the device in turn comprising; a sensing circuit configured to sense a sensing voltage of the resistive memory cell and to output a resultant value in response to the sensing voltage which is indicative for the actual cell state, a settling circuit including a plurality of current mirrors configured to settle the sensing voltage to a certain target voltage representing one of the M programmable cell states, a prebiasing circuit configured to pre-bias a bitline capacitance of the resistive memory cell such that the sensing voltage is close to the certain target voltage, and a resistance circuit including a plurality of resistors connected in series and coupled in parallel to the resistive memory cell, wherein the resistance circuit is configured to reduce an effective resistance seen by the prebiasing circuit, wherein the settling circuit and the resistance circuit are configured to form a plurality of current-resistor pairs being switchable to define a linear range of detection currents corresponding to the certain target voltages, each of the plurality of current-resistor pairs including one current mirror and one resistor.
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18. A method for determining an actual cell state of a resistive memory cell having a plurality M of programmable cell states, the method comprising:
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providing a prebiasing circuit, prebiasing a bitline capacitance of the resistive memory cell such that a sensing voltage is close to a certain target voltage which is indicative for the actual cell state, providing a resistance circuit including a plurality of resistors coupled in parallel to the resistive memory cell, wherein the resistance circuit is configured to reduce an effective resistance seen by the prebiasing circuit, settling the sensing voltage by a settling circuit to a certain target voltage representing one of the M programmable cell states, wherein the settling circuit and the resistance circuit are configured to form a plurality of current-resistor pairs being switchable to define a linear range detection currents corresponding to the certain target voltages, each of the plurality of current-resistor pairs including one current mirror and one resistor, sensing the sensing voltage of the resistive memory cell, and outputting a resultant value in response to the sensing voltage.
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Specification