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OPTIMIZING GATE PROFILE FOR PERFORMANCE AND GATE FILL

  • US 20170330955A1
  • Filed: 12/22/2014
  • Published: 11/16/2017
  • Est. Priority Date: 12/22/2014
  • Status: Active Grant
First Claim
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1. A semiconductor device, comprising:

  • a semiconductor substrate;

    a fin extending above the semiconductor substrate, the fin comprising a source region and drain region located on opposite sides of a channel region;

    a gate stack over the channel region, the gate stack comprising a top portion, a tapered portion and a bottom portion wherein the top portion is separated from the bottom portion by the tapered portion, wherein the top portion and at least a portion of the tapered portion are above the fin, and wherein the width of the top portion is greater than the width of the bottom portion.

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