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SYSTEM AND METHOD FOR MEMORY SYNCHRONIZATION OF A MULTI-CORE SYSTEM

  • US 20170337256A1
  • Filed: 08/04/2017
  • Published: 11/23/2017
  • Est. Priority Date: 02/04/2015
  • Status: Active Grant
First Claim
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1. A system for memory synchronization of a multi-core system, the system comprising:

  • a processor configured to execute instructions stored in memory to;

    operate as an assigning module to assign at least one memory partition to at least one core of the multi-core system;

    operate as a mapping module to provide information for a translation lookaside buffer (TLB) shootdown for the multi-core system by sending an interrupt to the at least one core of the multi-core system if a page table entry associated with the memory partition assigned to the at least one core is modified; and

    operate as an interface module to provide an interface for the assigning module operations from user-space.

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