PACKAGE STRUCTURES, POP DEVICES AND METHODS OF FORMING THE SAME

• US 20170345795A1
• Filed: 08/17/2016
• Published: 11/30/2017
• Est. Priority Date: 05/30/2016
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Yang, Tien-Chung, Su, An-Jhih, Chen, Hsien-Wei, Wang, Jo-Mei, Chen, Wei-Yu
• Granted Patent: US 9,941,248 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/12105 Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2225/0651 Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/0652 Bump or bump-like direct electrical connections from substrate to substrate
• CPC Class Codes: H01L 2225/06541 Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
• CPC Class Codes: H01L 2225/06568 the devices decreasing in size, e.g. pyramidical stack
• CPC Class Codes: H01L 2225/1023 the support being an insulating substrate
• CPC Class Codes: H01L 2225/1035 the device being entirely enclosed by the support, e.g. high-density interconnect [HDI]
• CPC Class Codes: H01L 2225/1058 Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 24/03 Manufacturing methods
• CPC Class Codes: H01L 24/09 of a plurality of bonding areas
• CPC Class Codes: H01L 24/17 : of a plurality of bump connectors
• CPC Class Codes: H01L 24/19 : Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/20 : Structure, shape, material or disposition of high density interconnect preforms
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

Package structures, PoP devices and methods of forming the same are disclosed. A package structure includes a first chip, a redistribution layer structure, a plurality of UBM pads, a plurality of connectors and a separator. The redistribution layer structure is electrically connected to the first chip. The UBM pads are electrically connected to the redistribution layer structure. The connectors are electrically connected to the UBM pads. The separator is over the redistribution layer structure and surrounds the connectors.

Claims

1. A package structure, comprising:

a first chip;

a redistribution layer structure electrically connected to the first chip, wherein the first chip is located on a first side of the redistribution layer structure;

a plurality of under-ball metallurgy (UBM) pads electrically connected to the redistribution layer structure;

a plurality of connectors electrically connected to the plurality of UBM pads; and

a separator over the redistribution layer structure and surrounding the connectors, wherein the plurality of connectors and the separator are located on at a second side of the redistribution layer structure, and the first side is opposite to the second side.

2. The package structure of claim 1, wherein the separator comprises a metal, a polymer or a combination thereof.

3. The package structure of claim 1, wherein a distance from an outermost UBM pad to an inner border of the separator is “

d”

, a width of the separator is “

W”

, and a ratio of d to W ranges from about 1;

1 to 1;

10.

4. The package structure of claim 1, wherein a distance from an outermost UBM pad to an inner border of the separator is “

d”

, a height of the separator is “

H”

, and a ratio of d to H ranges from about 1;

1 to 1;

10.

5. The package structure of claim 1, wherein a distance from an outermost UBM pad to an inner border of the separator is “

d”

, a distance from an edge of the package structure to an outer border of the separator is “

D”

, and a ratio of d to D ranges from about 1;

0.1 to 1;

5.

6. The package structure of claim 1, wherein the separator has a ring shape and surrounds the outmost connectors.

7. The package structure of claim 1, wherein an edge of the package structure has a stepped profile.

8. The package structure of claim 1, wherein the separator is at a floating potential.

9. A PoP device, comprising:

a first package structure, having a first side and a second side opposite to the first side, and comprising;

a first chip;

a redistribution layer structure electrically connected to the first chip;

a plurality of connectors electrically connected to the redistribution layer structure and exposed from the first side; and

a separator on the first side of the first package structure and aside the connectors;

a second package structure, over the second side of the first package structure; and

an electromagnetic interface layer covering a top and a sidewall of the second package structure and electrically connected to the redistribution layer structure of the first package structure.

10. The PoP device of claim 9, wherein the separator comprises a metal, a polymer or a combination thereof.

11. The PoP device of claim 9, wherein the first package structure further comprises a plurality of UBM pads on a top of the redistribution layer structure, and the plurality of connectors are connected to the plurality of UBM pads.

12. The PoP device of claim 11, wherein a distance from an outermost UBM pad to an inner border of the separator is “

d”

, a width of the separator is “

W”

, and a ratio of d to W ranges from about 1;

1 to 1;

10.

13. The PoP device of claim 11, wherein a distance from an outermost UBM pad to an inner border of the separator is “

d”

, a height of the separator is “

H”

, and a ratio of d to H ranges from about 1;

1 to 1;

10.

14. The PoP device of claim 11, wherein a distance from an outermost UBM pad to an inner border of the separator is “

d”

, a distance from an edge of the first package structure to an outer border of the separator is “

D”

, and a ratio of d to D ranges from about 1;

0.1 to 1;

5.

15. The PoP device of claim 9, wherein an outer border of the separator is aligned with an edge of the first package structure.

16. The PoP device of claim 9, wherein an edge of the first package structure has a stepped profile.

17. A method of manufacturing a package structure, comprising:

forming a redistribution layer structure over a first chip, wherein the redistribution layer structure is electrically connected to the first chip, and the first chip is located on a first side of the redistribution layer structure;

forming a plurality of UBM pads and a first separator surrounding the UBM pads, wherein the plurality of UBM pads is electrically connected to the redistribution layer structure; and

forming a plurality of connectors over the plurality of UBM pads, wherein the plurality of connectors and the first separator are located on at a second side of the redistribution layer structure, and the first side is opposite to the second side.

18. The method of claim 17, further comprising forming a second separator on the first separator after the step of forming the plurality of connectors.

19. The method of claim 18, wherein the first separator comprises a metal, and the second separator comprises a polymer.

20. The method of claim 17, wherein the plurality of UBM pads and the first separator are defined by the same photolithography reticle.