METHOD FOR CLOCK SYNCHRONIZATION OF AN INDUSTRIAL INTERNET FIELD BROADBAND BUS

• US 20170371832A1
• Filed: 09/13/2016
• Published: 12/28/2017
• Est. Priority Date: 06/23/2016
• Status: Active Grant

• Current Assignee: Kyland Technology Co.,Ltd.
• Original Assignee: Kyland Technology Co.,Ltd.
• Inventors: WEI, Jinju
• Granted Patent: US 10,162,790 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 1/12 Synchronisation of different clock signals provided by a plurality of clock generators
• CPC Class Codes: G06F 13/364 using independent requests or grants, e.g. using separated request and grant lines
• CPC Class Codes: G06F 13/404 with address mapping
• CPC Class Codes: G06F 13/4291 using a clocked protocol
• CPC Class Codes: H04J 3/0641 Change of the master or reference, e.g. take-over or failure of the master
• CPC Class Codes: H04J 3/0655 using timestamps
• CPC Class Codes: H04J 3/0667 Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays arrangements for monitoring round trip delays in packet switching networks H04L43/0864
• CPC Class Codes: H04L 12/4035 in which slots of a TDMA packet structure are assigned based on a contention resolution carried out at a master unit TDM/TDMA multiplex systems per se H04J3/1694; hybrid switching systems H04L12/64

Abstract

Disclosed is a method for clock synchronization of an industrial internet field broadband bus, wherein the method is applicable to an industrial internet field broadband bus architecture system including a bus controller and at least one bus terminal, the bus controller is connected with the bus terminal over a two-wire data transfer network, and the method includes steps of: electing one of the bus controller and the bus terminal as a best master clock; determining whether an IP address of the device of the best master clock is the same as an IP address of the bus controller; if so, then determining the bus controller as a master device of clock synchronization, and transmitting by the bus controller a synchronization message to the bus terminal for clock synchronization; and otherwise, returning to the step of electing one of the bus controller and the bus terminal as the best master clock.

Claims

1. A method for clock synchronization of an industrial internet field broadband bus, wherein the method is applicable to an industrial internet field broadband bus architecture system comprising a bus controller and at least one bus terminal, the bus controller is connected with the bus terminal over a two-wire data transfer network, and the method comprises steps of:

electing one of the bus controller and the bus terminal as a best master clock;

determining whether an IP address of the device of the best master clock is the same as an IP address of the bus controller;

if so, then determining the bus controller as a master device of clock synchronization, and transmitting by the bus controller a synchronization message to the bus terminal for clock synchronization; and

otherwise, returning to the step of electing one of the bus controller and the bus terminal as the best master clock.

2. The method according to claim 1, wherein the determining whether the IP address of the device of the best master clock is the same as the IP address of the bus controller comprises:

transmitting the IP address of the device of the best master clock to the bus controller, so that the bus controller compares the IP address of the device of the best master clock with the IP address of the bus controller for consistency;

or

the device of the best master clock compares its own IP address with an IP address of the bus controller for consistency.

3. The method according to claim 1, wherein after the step of returning to the step of electing one of the bus controller and the respective bus terminals as the best master clock, the method further comprises:

if the best master clock is elected for a number of times above a preset threshold, then stopping electing the best master clock, and transmit by the bus controller an alarm for calibrating a clock source.

4. The method according to claim 1, wherein the electing one of the bus controller and the bus terminal as the best master clock comprises:

electing one of the bus controller and the bus terminal as the best master clock through the best master clock algorithm in an IEEE1588 clock protocol.

5. The method according to claim 1, wherein the method further comprises:

segmenting a transmission period of time available over a bus in the two-wire data transfer network into synchronization time slices and data time slices;

the transmitting, by the bus controller, the synchronization message to the bus terminal for clock synchronization comprises;

transmitting, by the bus controller, the synchronization message to the bus terminal in the synchronization time slices, wherein the synchronization message carries a timestamp concerning when the synchronization message is transmitted, so that the bus terminal is synchronized in clock according to the timestamp, wherein the timestamp is derived using a clock of the bus controller.

6. The method according to claim 5, wherein the transmitting, by the bus controller, the synchronization message to the bus terminal in the synchronization time slices comprises:

Determining, by the bus controller, whether the bus controller operates in its synchronization time slice, and if so, then retrieving the synchronization message from a real-time data container of the bus container in the time slice as data to be transmitted, and transmitting the synchronization message.

7. The method according to claim 5, wherein the method further comprises:

allocating, by the bus controller, the data time slices for the bus controller and the bus terminal.

8. The method according to claim 7, wherein:

if data to be transmitted in the data time slices are configuration information for the bus controller to configure the bus terminal, then the data to be transmitted will be a message with a destination address being IP addresses of the bus terminals corresponding to configuration information.

9. The method according to claim 8, wherein the method further comprises:

determining, by the bus controller, whether the configuration information is real-time data; and

if so, then transmitting the configuration information in the data time slices using a Time-Triggered Ethernet (TTE) or using a Time Division Multiple Access (TDMA);

otherwise, transmitting the configuration information using CSMA/CD collision detection.

10. The method according to claim 8, wherein the transmitting the configuration information using the Time-Triggered Ethernet (TTE) comprises:

determining, by the bus controller, whether the bus controller operates in its data time slice, and if so, then retrieving the configuration information from a real-time data container of the bus controller in the time slice as data to be transmitted, and transmitting the configuration information.

11. The method according to claim 2, wherein the method further comprises:

segmenting a transmission period of time available over a bus in the two-wire data transfer network into synchronization time slices and data time slices;

the transmitting, by the bus controller, the synchronization message to the bus terminal for clock synchronization comprises;

transmitting, by the bus controller, the synchronization message to the bus terminal in the synchronization time slices, wherein the synchronization message carries a timestamp concerning when the synchronization message is transmitted, so that the bus terminal is synchronized in clock according to the timestamp, wherein the timestamp is derived using a clock of the bus controller.

12. The method according to claim 3, wherein the method further comprises:

segmenting a transmission period of time available over a bus in the two-wire data transfer network into synchronization time slices and data time slices;

the transmitting, by the bus controller, the synchronization message to the bus terminal for clock synchronization comprises;

transmitting, by the bus controller, the synchronization message to the bus terminal in the synchronization time slices, wherein the synchronization message carries a timestamp concerning when the synchronization message is transmitted, so that the bus terminal is synchronized in clock according to the timestamp, wherein the timestamp is derived using a clock of the bus controller.

13. The method according to claim 4, wherein the method further comprises:

segmenting a transmission period of time available over a bus in the two-wire data transfer network into synchronization time slices and data time slices;

the transmitting, by the bus controller, the synchronization message to the bus terminal for clock synchronization comprises;

transmitting, by the bus controller, the synchronization message to the bus terminal in the synchronization time slices, wherein the synchronization message carries a timestamp concerning when the synchronization message is transmitted, so that the bus terminal is synchronized in clock according to the timestamp, wherein the timestamp is derived using a clock of the bus controller.