SEMICONDUCTOR STRUCTURE AND METHODS FOR CRYSTALLIZING METAL OXIDE SEMICONDUCTOR LAYER

• US 20180006157A1
• Filed: 06/28/2017
• Published: 01/04/2018
• Est. Priority Date: 06/29/2016
• Status: Active Grant

• Current Assignee: AU Optronics Corporation
• Original Assignee: AU Optronics Corporation
• Inventors: YE, Jia-Hong
• Granted Patent: US 10,446,691 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/02178 the material containing aluminium, e.g. Al2O3
• CPC Class Codes: H01L 21/02244 of a metallic layer
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02425 Conductive materials, e.g. metallic silicides
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02592 amorphous
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 21/02672 using crystallisation enhancing elements
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/42356 Disposition, e.g. buried gate electrode H01L29/42324 and H01L29/4234 take precedence
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

The present invention provides two methods for crystallizing a metal oxide semiconductor layer and a semiconductor structure. The first crystallization method is treating an amorphous metal oxide semiconductor layer including indium with oxygen at a pressure of about 550 mtorr to about 5000 mtorr and at a temperature of about 200° C. to about 750° C. The second crystallization method is, firstly, sequentially forming a first amorphous metal oxide semiconductor layer, an aluminum layer, and a second amorphous metal oxide semiconductor layer on a substrate, and, secondly, treating the first amorphous metal oxide semiconductor layer, the aluminum layer, and the second amorphous metal oxide semiconductor layer with an inert gas at a temperature of about 350° C. to about 650° C.

Claims

1. A method for crystallizing a metal oxide semiconductor layer, comprising:

forming an amorphous metal oxide semiconductor layer on a substrate, the amorphous metal oxide semiconductor layer comprising indium; and

treating the amorphous metal oxide semiconductor layer with oxygen at a pressure of about 550 mtorr to about 5000 mtorr at a temperature of about 200°

C. to about 750°

C., and changing a part of the amorphous metal oxide semiconductor layer into an indium oxide crystallization layer.

2. The method according to claim 1, further comprising:

heating the indium oxide crystallization layer.

3. The method according to claim 2, wherein the heating the indium oxide crystallization layer is performed at a temperature of about 200°

C. to about 800°

C.

4. The method according to claim 1, wherein a radio-frequency power source is further comprised, and when the amorphous metal oxide semiconductor layer is being treated with oxygen, an output power of the radio-frequency power source is 0.

5. The method according to claim 1, wherein a radio-frequency power source is further comprised, and when the amorphous metal oxide semiconductor layer is being treated with oxygen, an output power of the radio-frequency power source is greater than 0.

6. A method for crystallizing a metal oxide semiconductor layer, comprising:

forming a first amorphous metal oxide semiconductor layer on a substrate;

forming an aluminum layer on the first amorphous metal oxide semiconductor layer;

forming a second amorphous metal oxide semiconductor layer on the aluminum layer; and

treating the first amorphous metal oxide semiconductor layer, the aluminum layer, and the second amorphous metal oxide semiconductor layer with an inert gas at a temperature of about 350°

C. to about 650°

C.

7. The method according to claim 6, wherein the inert gas comprises nitrogen gas, helium gas, neon gas, argon gas, krypton gas, xenon gas, radon gas or a combination thereof.

8. The method according to claim 6, wherein the first amorphous metal oxide semiconductor layer and the second amorphous metal oxide semiconductor layer independently comprise indium gallium zinc oxide, indium tin zinc oxide, hafnium indium zinc oxide or indium zinc oxide.

9. A semiconductor structure, comprising:

a substrate;

a gate, configured on the substrate;

a gate insulation layer, located on the gate;

a first crystallized metal oxide semiconductor layer, configured on the gate insulation layer;

an aluminum oxide layer, located on the first crystallized metal oxide semiconductor layer;

a second crystallized metal oxide semiconductor layer, configured on the aluminum oxide layer; and

a source and a drain, configured on the second crystallized metal oxide semiconductor layer.

10. The semiconductor structure according to claim 9, wherein the first crystallized metal oxide semiconductor layer and the second crystallized metal oxide semiconductor layer are holocrystalline.

11. The semiconductor structure according to claim 9, wherein the first crystallized metal oxide semiconductor layer and the second crystallized metal oxide semiconductor layer independently comprise indium gallium zinc oxide, indium tin zinc oxide, hafnium indium zinc oxide or indium zinc oxide.

12. The semiconductor structure according to claim 9, wherein the first crystallized metal oxide semiconductor layer and the second crystallized metal oxide semiconductor layer independently comprise an indium gallium zinc oxide (InGaZnO₄) crystal and an indium oxide (In₂O₃) crystal.