ELECTRONIC DEVICE AND METHOD FOR OPERATING THE SAME
First Claim
1. An electronic device capable of placing restrictions on processor usage, comprising:
- a memory; and
a processor comprising a first core and a second core,wherein the memory includes stored instructions that, when executed by the processor cause the first core to transition from an online state to an idle state in response to a restriction signal for the first core, and cause the first core to transition to a power save state when the first core remains in the idle state for at least a preset time.
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Accused Products
Abstract
An electronic device capable of placing restrictions on processor usage is disclosed. The electronic device may include: a memory; and a processor including a first core and a second core. The memory may store instructions that, when executed by the processor, cause the first core to transition from an active state to an idle state in response to a restriction signal for the first core, and cause the first core to transition to a power save state when the first core remains in the idle state for at least a preset time. For hot-unplugging, as the electronic device does not transition a core to an offline state, it does not have to perform cleanup operation on the memory and variables. Hence, it is possible to reduce the latency time due to hot-unplugging.
10 Citations
20 Claims
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1. An electronic device capable of placing restrictions on processor usage, comprising:
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a memory; and a processor comprising a first core and a second core, wherein the memory includes stored instructions that, when executed by the processor cause the first core to transition from an online state to an idle state in response to a restriction signal for the first core, and cause the first core to transition to a power save state when the first core remains in the idle state for at least a preset time. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method of operating an electronic device capable of placing restrictions on the usage of a processor including a first core and a second core, the method comprising:
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causing the first core to transition from an online state to an idle state in response to a restriction signal for the first core; and causing the first core to transition to a power save state when the first core remains in the idle state for at least a preset time. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20)
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Specification