MEMORY DEVICE AND MEMORY SYSTEM HAVING THE SAME
First Claim
Patent Images
1. A memory device comprising:
- a memory cell;
a bit line connected to the memory cell;
a control voltage generator configured to generate a proportional to absolute temperature (PTAT) current based on a control code, and to generate an analog control voltage inversely proportional to the PTAT current; and
a load current control circuit configured to control a first load current supplied to the bit line based on the analog control voltage.
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Abstract
A memory device includes a memory cell, a bit line connected to the memory cell, a control voltage generator configured to generate a proportional to absolute temperature (PTAT) current and generate an analog control voltage inversely proportional to the PTAT current, and a load current control circuit configured to control a first load current supplied to the bit line based on the analog control voltage.
3 Citations
20 Claims
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1. A memory device comprising:
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a memory cell; a bit line connected to the memory cell; a control voltage generator configured to generate a proportional to absolute temperature (PTAT) current based on a control code, and to generate an analog control voltage inversely proportional to the PTAT current; and a load current control circuit configured to control a first load current supplied to the bit line based on the analog control voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A memory system comprising:
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a memory controller; and a memory device connected to the memory controller, the memory device including, a memory cell, a bit line connected to the memory cell, a control voltage generator configured to generate a proportional to absolute temperature (PTAT) current based on a control code, and to generate an analog control voltage inversely proportional to the PTAT current, and a load current control circuit configured to control a first load current supplied to the bit line based on the analog control voltage. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A memory device comprising:
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a control voltage generator configured to generate an analog control voltage that is inversely proportional to a proportional to absolute temperature (PTAB) current; and a load current control circuit configured generate a first load current based on the analog control voltage, the first load current being supplied to a memory cell via a bit line. - View Dependent Claims (17, 18, 19, 20)
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Specification