PROGRAMMABLE CURRENT FOR CORRELATED ELECTRON SWITCH

• US 20180026625A1
• Filed: 07/25/2017
• Published: 01/25/2018
• Est. Priority Date: 08/13/2015
• Status: Active Grant

• Current Assignee: Arm Limited (SoftBank Group Corp.)
• Original Assignee: Arm Limited (SoftBank Group Corp.)
• Inventors: Sandhu, Bal S., Lattimore, George McNeil, Aitken, Robert Campbell
• Granted Patent: US 10,447,260 B2
• Time in Patent Office: Days
• CPC Class Codes: G11C 13/0007 comprising metal oxide memory material, e.g. perovskites
• CPC Class Codes: G11C 13/0069 Writing or programming circuits or methods
• CPC Class Codes: G11C 2013/0078 Write using current through the cell
• CPC Class Codes: G11C 29/021 in voltage or current generators
• CPC Class Codes: G11C 29/028 with adaption or trimming of parameters
• CPC Class Codes: H03K 17/14 Modifications for compensating variations of physical values, e.g. of temperature
• CPC Class Codes: H10N 70/20 Multistable switching devices, e.g. memristors
• CPC Class Codes: H10N 70/8833 Binary metal oxides, e.g. TaOx
• CPC Class Codes: H10N 70/8845 Carbon or carbides
• CPC Class Codes: H10N 99/03 Devices using Mott metal-insulator transition, e.g. field effect transistors

Abstract

Subject matter disclosed herein may relate to programmable current for correlated electron switches.

Claims

1-23. -23. (canceled)

24. A method, comprising:

providing a programmable current to a correlated electron switch at least in part to cause a transition in the correlated electron switch from a first impedance state to a second impedance state, including controlling the programmable current to a specified compliance current level.

25. The method of claim 24, wherein the first and second impedance states respectively include particular approximate resistance and capacitance characteristics, wherein the capacitance of the first impedance state exceeds the capacitance of the second impedance state.

26. The method of claim 24, wherein the providing the programmable current to the correlated electron switch comprises generating the programmable current at least in part in accordance with a digital code.

27. The method of claim 26, wherein the digital code specifies a particular current level of a plurality of current levels available from a programmable current source.

28. The method of claim 27, wherein the generating the programmable current at least in part in accordance with the digital code comprises generating a programmable current having a level that is a multiple of a unit current level, wherein the multiple is determined at least in part by the digital code.

29. The method of claim 27, wherein the first impedance state comprises a higher impedance state and the second impedance state comprises a lower impedance state, and wherein the generating the programmable current at least in part in accordance with the digital code comprises the controlling the programmable current to the specified compliance current level.

30. The method of claim 29, wherein the generating the programmable current at least in part in accordance with the digital code comprises generating the current sufficient to achieve a set condition and limited to the specified compliance current level to transition the correlated electron switch from the higher impedance state to the lower impedance state.

31. The method of claim 30, further comprising subsequently generating the programmable current at least in part in accordance with a subsequent digital code, including generating a current sufficient to achieve a reset condition to transition the correlated electron switch from the lower impedance state to the higher impedance state, wherein the subsequent digital code specifies a current greater than that specified by the digital code.

32. The method of claim 26, wherein the digital code comprises a first plurality of bits specifying a current level substantially sufficient to cause the transition in the correlated electron switch from the first impedance state to the second impedance state, and wherein the digital code further comprises a second plurality of bits specifying a current level to compensate for variations in process, voltage, or temperature, or a combination thereof, for the correlated electron switch.

33. The method of claim 24, further comprising providing a reference voltage output utilized in conjunction with the programmable current causing the transition in the correlated electron switch from the first impedance state to the second impedance state at least in part in response to an assertion of a write enable signal and at least in part in response to an assertion of a set or reset signal.

34. An apparatus, comprising:

a programmable current source to generate a current for a correlated electron switch at least in part to cause a transition in the correlated electron switch from a first impedance state to a second impedance state, the programmable current source to limit the current to a specified compliance current level.

35. The apparatus of claim 34, the first and second impedance states respectively to include particular approximate resistance and capacitance characteristics, the capacitance of the first impedance state to exceed the capacitance of the second impedance state.

36. The apparatus of claim 34, wherein, to generate the current for the correlated electron switch, the programmable current source to generate the current at least in part in accordance with a first digital code.

37. The apparatus of claim 36, the digital code to specify a particular current level of a plurality of current levels to be available from the programmable current source.

38. The apparatus of claim 37, wherein, to generate the current at least in part in accordance with the first digital code, the programmable current source to generate the current to have a level to comprise a multiple of a unit current level, the multiple to be specified at least in part by the first digital code.

39. The apparatus of claim 37, the first impedance state to comprise a higher impedance state and the second impedance state to comprise a lower impedance state, and wherein, to generate the current at least in part in accordance with the first digital code, the programmable current source to limit the current at least in part in accordance with the specified compliance current level.

40. The apparatus of claim 39, wherein, to generate the current at least in part in accordance with the first digital code, the programmable current source to generate the current sufficient to achieve a set condition and to limit the current to the specified compliance current level to transition the correlated electron switch from the higher impedance state to the lower impedance state.

41. The apparatus of claim 40, wherein the programmable current source further to subsequently generate the current at least in part in accordance with a subsequent digital code, to include the programmable current source to generate a current sufficient to achieve a reset condition to transition the correlated electron switch from the lower impedance state to the higher impedance state, wherein the subsequent digital code to specify a current level greater than that to be specified by the first digital code.

42. The apparatus of claim 36, wherein the first digital code to comprise a first plurality of bits to specify a current level substantially sufficient to cause the transition in the correlated electron switch from the first impedance state to the second impedance state, and wherein the first digital code further to comprise a second plurality of bits to specify a current level to compensate for variations in process, voltage, or temperature, or a combination thereof, for the correlated electron switch.

43. The apparatus of claim 34, wherein the programmable current source further to provide a reference voltage output to be utilized in conjunction with the current to cause the transition in the correlated electron switch from the first impedance state to the second impedance state at least in part in response to an assertion of a write enable signal and at least in part in response to an assertion of a set or reset signal.