ELECTROMAGNETIC SENSING AND DETECTION OF INGESTIBLE EVENT MARKERS

• US 20180026680A1
• Filed: 07/24/2017
• Published: 01/25/2018
• Est. Priority Date: 07/22/2016
• Status: Active Grant

• Current Assignee: Otsuka Pharmaceutical Company Limited (Otsuka Holdings Company Limited)
• Original Assignee: Proteus Digital Health, Inc. (Otsuka Holdings Company Limited)
• Inventors: Shirvani, Alireza, Zdeblick, Mark, Wirthrington, Jonathan
• Granted Patent: US 10,187,121 B2
• Time in Patent Office: Days
• CPC Class Codes: A61B 2560/0214 of power generation or supply
• CPC Class Codes: A61B 2562/08 Sensors provided with means for identification, e.g. barcodes or memory chips
• CPC Class Codes: A61B 5/073 Intestinal transmitters
• CPC Class Codes: A61B 5/4238 stomach
• CPC Class Codes: A61B 5/4833 Assessment of subject's compliance to treatment
• CPC Class Codes: A61B 5/4848 Monitoring or testing the effects of treatment, e.g. of medication
• CPC Class Codes: A61B 5/6861 Capsules, e.g. for swallowing or implanting
• CPC Class Codes: A61B 5/7203 for noise prevention, reduction or removal
• CPC Class Codes: A61B 5/7282 Event detection, e.g. detecting unique waveforms indicative of a medical condition A61B5/4094, A61B5/4818, A61B5/349, A61B5/0823 take precedence
• CPC Class Codes: H01Q 1/27 Adaptation for use in or on movable bodies H01Q1/08, H01Q1/12, H01Q1/18 take precedence
• CPC Class Codes: H01Q 1/273 Adaptation for carrying or wearing by persons or animals
• CPC Class Codes: H01Q 7/00 Loop antennas with a substantially uniform current distribution around the loop and having a directional radiation pattern in a plane perpendicular to the plane of the loop
• CPC Class Codes: H03K 3/02 Generators characterised by the type of circuit or by the means used for producing pulses H03K3/64 - H03K3/84 take precedence
• CPC Class Codes: H04B 1/16 Circuits
• CPC Class Codes: H04B 5/24 Inductive coupling
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

Provided is an electronic device having a control device, a driver circuit coupled to the control device. The driver circuit is configured to alter conductance. A partial power source is coupled to the control device and is configured to provide a voltage potential difference to the control device and the driver circuit as a result of the partial power source being in contact with a conductive fluid. The partial power source includes a first material electrically coupled to the control device and a second material electrically coupled to the control device and electrically isolated from the first material. An inductor is coupled to the driver circuit. The driver circuit is configured to develop a current through the inductor. The magnitude of the current developed through the inductor is varied to produce an encoded signal that is remotely detectable by a receiver. Receivers to receive and decode also are disclosed.

Claims

1. An electronic device comprising:

a control device;

a driver circuit coupled to the control device, the driver circuit configured to alter conductance;

a partial power source coupled to the control device, the partial power source is configured to provide a voltage potential difference to the control device and the driver circuit as a result of the partial power source being in contact with a conductive fluid, the partial power source comprising;

a first material electrically coupled to the control device; and

a second material electrically coupled to the control device and electrically isolated from the first material;

an inductor coupled to the driver circuit, wherein the driver circuit is configured to develop a current through the inductor, and wherein a magnitude of the current developed through the inductor is varied to produce an encoded signal that is remotely detectable by a receiver.

2. The electronic device of claim 1, wherein the driver circuit comprises a single ended driver circuit.

3. The electronic device of claim 1, wherein the driver circuit comprises a push-pull H-bridge driver circuit.

4. The electronic device of claim 1, wherein the driver circuit comprises:

cross-coupled transistors; and

a capacitor coupled between drains of the cross-coupled transistors;

wherein the inductor is coupled between the drains of the cross-coupled transistors.

5. The electronic device of claim 1, further comprising:

a battery voltage doubler circuit;

a pulse generator circuit coupled to the battery voltage doubler circuit; and

an inductor discharge circuit coupled to the pulse generator circuit.

6. The electronic device of claim 5, wherein the battery voltage doubler circuit comprises:

a switched capacitor stage comprising first and second switched capacitors, wherein the switched capacitor stage receives an input voltage and outputs an output voltage having a magnitude of twice the input voltage; and

a clock stage;

wherein the clock stage receives a pulse train and produces clock pulses of opposite phases, wherein the clock pulses of opposite phases cause the first and second capacitors to alternately charge to a voltage equal to twice the input voltage.

7. The electronic circuit of claim 5, wherein the pulse generator circuit comprises:

first and second trigger circuits;

an RC timing circuit comprising a resistor R and a capacitor C to set a time constant delay τ

at the input of the second delayed trigger circuit;

an inverter coupled to the output of the first undelayed trigger circuit; and

a logic gate having a first input coupled to an output of the inverter, a second input coupled to an output of the second trigger circuit, and an output coupled to the inductor trigger circuit;

a first oscillator coupled to the input of the first trigger circuit and coupled to the RC timing circuit; and

a second oscillator coupled to the inductor trigger circuit.

8. The electronic circuit of claim 5, wherein the inductor discharge circuit comprises:

a capacitor charging circuit;

a coupling circuit; and

charging and discharging circuits for charging and discharging the inductor.

9. The electronic circuit of claim 1, wherein the driver circuit is configured to implement an impulse communication protocol.

10. The electronic device of claim 1, wherein the first and second materials are selected to provide the voltage potential difference as a result of the first and second materials being in contact with the conductive fluid.

11. The electronic device of claim 1, comprising an electronic switch, wherein the electronic switch comprises first and second terminals and a control terminal, and wherein the control terminal is operatively coupled to the driver circuit, the first terminal is coupled to the inductor, and the second terminal is coupled to the second material, and wherein the inductor is coupled between the first material and the first terminal of the electronic switch, wherein the driver circuit is configured to alter the conductance of the electronic switch between the first and second materials such that the current is developed through the inductor.

12. The electronic device of claim 1, wherein the inductor comprises at least two inductive elements formed on separate insulating substructures of a semiconductor integrated circuit.

13. The electronic device of claim 12, wherein the at least two inductive elements are coupled through a via formed between the separate insulating substructures.

14. A receiver circuit, comprising:

a resonant circuit;

a low noise voltage amplifier coupled to the resonant circuit; and

a receiver processor circuit coupled to an output of the low noise voltage amplifier, the receiver processor configured to receive an analog signal representative of an impulse communication signal, convert the analog signal to a digital signal, and decode the digital signal to reproduce data transmitted as the impulse communication signal.

15. The receiver of claim 14, further comprising a narrow band resonator coupled between the low noise amplifier and the receiver processor circuit.

16. A receiver circuit, comprising:

a receiving inductor;

a transimpedance amplifier coupled to the receiving coil;

an amplifier coupled to an output of the transimpedance amplifier; and

a receiver processor circuit coupled to an output of the amplifier, the receiver processor configured to receive an analog signal representative of an impulse communication signal, convert the analog signal to a digital signal, and decode the digital signal to reproduce data transmitted as the impulse communication signal.

17. The receiver circuit of claim 16, wherein the receiver processor comprises:

an analog-to-digital converter (ADC); and

a digital signal processor coupled to an output of the ADC.

18. The receiver of claim 16, comprising:

at least three receiving inductors orthogonally spaced relative to each other;

at least three amplifiers coupled to corresponding orthogonally spaced inductors;

a multiplexer to receiver outputs of the at least three amplifiers;

an analog-to-digital converter (ADC) coupled to an output of the multiplexer; and

a digital signal processor coupled to an output of the ADC.

19. The receiver of claim 18, wherein at least one of the three inductors has an overall elongated form factor.

20. The receiver of claim 18, wherein at least one of the three inductors has an overall flat form factor.

21. The receiver of claim 16, comprising:

a plurality of band pass filters coupled to the output of the multiplexer, wherein each band pass filter is tuned to a different frequency band;

a plurality of amplifiers coupled to the corresponding plurality of band pass filters;

a plurality of analog-to-digital converters (ADCs) having inputs coupled to outputs of the band pass filters and having outputs coupled to the digital signal processor.

22. The receiver of claim 21, further comprising a wireless communication element.

23. The receiver of claim 16, comprising:

a plurality of receiving inductors;

a plurality of corresponding amplifiers coupled to plurality of inductors;

a multiplexer to receiver outputs of the plurality of amplifiers;

an analog-to-digital converter (ADC) coupled to an output of the multiplexer; and

a digital signal processor coupled to an output of the ADC.

24. The receiver of claim 23, wherein the plurality of receiving inductors is arranged in a circular pattern.